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[WS1][CUDA][Qwen3-Next] Restore CUDA dispatch for rms_norm (RFC #428 stack 1/4) - #466

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fusheng-ji:fix/registry-cuda-rmsnorm-dispatch
Oct 6, 2026
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@fusheng-ji

@fusheng-ji fusheng-ji commented Oct 4, 2026 •

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Latest Status [2026-10-04]

Ready for review. Bottom of a four-PR stack for #428; self-contained.

2026-10-04 (later): the maintainers retargeted this PR to test-qwennext and asked for conflicts to be
resolved. Rebased onto test-qwennext (11cac8c, which main now also points at). That branch fixes
rl_engine/tests/test_dispatch.py::test_npu_registry_preserves_per_operator_cpu_fallbacks itself
(88474a9), so the separate test-only commit this PR used to carry for it (bfdfebc) is dropped; the
remaining three commits apply with an identical patch (git patch-id over the three files). Test
results below predate the rebase; 6d8b4bc..11cac8c is formatting, lint/docs/CI configuration and the
logp indexed-write fix, none of which touches these files except the formatting-only change to
rl_engine/tests/test_dispatch.py, which this PR no longer modifies.

2026-10-04: rebased onto main (6d8b4bc) and every commit signed off (DCO). The three
commits apply with an identical patch; the five main commits picked up by the rebase touch
docs/ and the logp kernels only, none of the four files here. Test results below were
measured before the rebase, on 32b765e.

2026-10-04, maintainer review: the four CUDA RMSNorm launchers in csrc/cuda/rmsnorm.cu (forward,
backward dx, partial and reduce dweight) took the current CUDA stream without switching to the input's
device, so an input on cuda:1 while cuda:0 is current launched on the wrong GPU. 6a4f078 adds
at::cuda::OptionalCUDAGuard(device_of(x)) to each (the form activation.cu uses; the headers are now
included unconditionally, matching that file, while the file's existing c10::cuda::CUDAGuard stays inside
its !USE_ROCM block) and a two-device test, test_cuda_rms_norm_runs_on_the_input_device_not_the_current_one,
which runs the op on cuda:1 with cuda:0 current and requires the result to be on cuda:1 and bitwise
equal to the cuda:0 run. Verified on a 2×B200 node with the extension rebuilt from this commit:
tests/test_rms_norm.py 58 passed, 72 skipped (the new test among the passes); CPU 41 passed, 89 skipped.
The three PRs stacked on this one carry the same change through the rebase.

2026-10-04, review: 1dd6dbb makes tests/test_rms_norm.py's _HAS_CUDA_RMSNORM gate require the
same two symbols as RMSNormCudaOp.__init__ (it also required rmsnorm_backward_dw, which the op
never calls), so the dispatch test agrees with the construction guard on every build. Test-only;
CPU: tests/test_rms_norm.py + rl_engine/tests/test_dispatch.py 54 passed, 88 skipped.

Line numbers refer to this branch (6a4f078; the fix commit shifts csrc/cuda/rmsnorm.cu by 4 lines below the includes and appends to tests/test_rms_norm.py). This PR inserts lines ahead of and inside
the cuda map, so later positions differ from main.

Summary

Bitwise status: this PR changes which rms_norm op the registry returns on CUDA.
RMSNormCudaOp (shared-memory tree over choose_threads(H) threads) and the PyTorch
reference (fixed 32-wide chunked sum) are not bitwise equal, so results that compare
across the registry boundary will change. get_op("rms_norm") has no production
callers; every call site is a test.

  • Bug. tests/test_rms_norm.py::test_registry_dispatches_rms_norm asserts that
    get_op("rms_norm") returns RMSNormCudaOp on a CUDA machine with the extension. That
    can never hold: OpBackend has no CUDA member for rms_norm, and the cuda priority
    list contains only the PyTorch reference. The test fails on every CUDA machine that
    builds the extension.
  • Fix.
    • Add OpBackend.CUDA_RMS_NORM, ahead of the PyTorch reference in the cuda list, as
      for silu, swiglu and det_gemm.
    • Make RMSNormCudaOp.__init__ check the extension and the two symbols the op calls.
      The registry treats a backend whose construction raises as unavailable, so an
      unbuilt install still falls back to the PyTorch reference.
  • It restores a lost change. 4de96a4 added the backend, the CUDA-first ordering and
    the test together. The merge c65dc30 kept the test and dropped the registry entry
    (see Notes).

Files

file commit status
rl_engine/kernels/registry.py 22f2ac3 OpBackend.CUDA_RMS_NORM; cuda list puts it first (:157, :593)
rl_engine/kernels/ops/cuda/norm/rmsnorm.py 22f2ac3, ba9b89e __init__ symbol check (rmsnorm_forward, rmsnorm_backward_dx)
csrc/cuda/rmsnorm.cu 6a4f078 device guard on the input's device in the four launchers; CUDAGuard.h/CUDAException.h included unconditionally
tests/test_rms_norm.py 22f2ac3, ba9b89e, 1dd6dbb, 6a4f078 6 regression cases for the construction guard and fallback; dispatch-test symbol gate matches the op (1dd6dbb)

Test

MAX_JOBS=32 TORCH_CUDA_ARCH_LIST=10.0 RL_KERNEL_REQUIRE_EXT=1 \
    pip install --no-build-isolation --no-deps -e .
pytest tests/test_rms_norm.py -q
pytest rl_engine/tests/test_dispatch.py -q
pytest tests/ rl_engine/tests/ -q -p no:randomly --ignore=tests/test_rocm_aiter_api_contract.py
python scripts/check_operator.py --op rms_norm --candidate cuda --device cuda --dtype bf16 \
    --batch 2 --seq 16 --normalized-dim 4096 --seed 123 --check-grad
python scripts/check_operator.py --op rms_norm --candidate cuda --device cuda --dtype bf16 \
    --batch 2 --seq 16 --normalized-dim 2048 --seed 123 --check-grad

That is the local install. The cluster built the same extension in place with the same
environment variables (python setup.py build_ext --inplace) and checked that _C was
loaded from the checkout under test.

tests/test_rocm_aiter_api_contract.py is ignored because it fails to import on main:
it imports _AITER_FWD_REQUIRED_KEYWORDS, which rocm/attention/flash_attn.py does not
define. This PR does not touch it.

Test results

Two environments, both B200 (sm_100):

  • Local: driver 580.126.20, torch 2.13.0+cu130, triton 3.7.1, Python 3.12.14.
  • Cluster: a B200 node with the same software. Its main baseline ran on the
    same node type.

The extension was built from source in both. Lint and types were checked on Python 3.10
with the pinned hooks.

check main (32b765e) this PR, measured at its pre-rebase tip bfdfebc
tests/test_rms_norm.py 1 failed, 50 passed, 72 skipped 57 passed, 72 skipped
full suite, local 19 failed, 2940 passed, 923 skipped 17 failed, 2948 passed, 923 skipped
full suite, cluster 17 failed, 2942 passed, 923 skipped 15 failed, 2950 passed, 923 skipped
check_operator rms_norm bf16, H=4096 / H=2048 (cluster) — pass_rate=1.0000 / pass_rate=1.0000
real pre-commit — no new findings
mypy --ignore-missing-imports rl_engine/ — no new errors
mkdocs build --strict 8 warnings the same 8

Failure sets were compared by test ID: no new failures. One failure on main (32b765e) is
fixed: test_registry_dispatches_rms_norm. (The NPU dispatch-test failure listed below was fixed on
test-qwennext by 88474a9; the commit this PR carried for it has been dropped, see Latest Status.)

Failure IDs (cluster): main vs this branch
main (32b765e): 17 failed
  [fixed on test-qwennext by 88474a9] rl_engine/tests/test_dispatch.py::test_npu_registry_preserves_per_operator_cpu_fallbacks
  tests/distributed/test_rocm_attention_transport.py::test_rccl_adapter_world_sizes_match_the_shared_collective
  tests/test_attention_correctness.py::test_strict_rocm_aiter_ck_direct_decode_rejects_ignored_output
  tests/test_attention_correctness.py::test_strict_rocm_aiter_ck_direct_decode_uses_callers_output
  tests/test_attention_correctness.py::test_strict_rocm_aiter_ck_reuses_immutable_provenance_inputs
  tests/test_attention_dispatch.py::test_implementation_kind_policy_filters_without_marking_fallback
  tests/test_attention_dispatch.py::test_registered_backend_resolves_with_provenance
  tests/test_cross_config_cli.py::test_run_uses_only_cpu_and_resumes_when_cuda_is_available
  tests/test_cross_config_runner.py::test_cpu_smoke_cases_preserve_read_only_scoring_and_exact_provenance
  tests/test_cross_config_runner.py::test_runner_resumes_valid_attempt_and_retries_after_identity_or_tensor_change
  tests/test_distributed_grpo_loss.py::TestSingleRank::test_dispatch_resolves_this_backend
  tests/test_linear_logp.py::test_triton_det_tp_matches_single_rank_and_replicates[2]
  [fixed here] tests/test_rms_norm.py::test_registry_dispatches_rms_norm
  tests/test_rocm_logprob_backend.py::TestFusedKernelPath::test_tile_stats_read_input_dtype_exactly[triton]
  tests/test_swiglu.py::test_autograd_wrapper_contiguity_and_gradient_routing[True-needs_grad2]
  tests/test_ws1_candidate_evidence.py::test_ws1_cuda_and_triton_candidate_runtime_provenance
  tests/test_ws1_chain_integration.py::test_row_local_linear_vjp_matches_per_row_outer_and_gemv

pre-rebase tip (bfdfebc): 15 failed, all also failing on main

Notes

How the registry entry was lost (history)

4de96a4 ("feat(attention): bind strict H100 QK norm and RoPE path", 2026-08-16) added,
in one commit:

  • OpBackend.CUDA_RMS_NORM;
  • the CUDA-first rms_norm list;
  • the isinstance(op, RMSNormCudaOp) assertion;
  • an __init__ guard.

The merge c65dc30 ("Merge origin/test into PR #263", 2026-08-24) kept the test and
dropped the registry entry:

parent      registry: CUDA_RMS_NORM   test: isinstance(op, RMSNormCudaOp)
fb58a1c                           2                                    1
82dd76e                           0                                    0
c65dc30 (result)                  0                                    1
main                              0                                    1
git log --format='%h %ad %s' --date=short main -S'CUDA_RMS_NORM'
for p in fb58a1c 82dd76e c65dc30; do
  echo $p $(git show $p:rl_engine/kernels/registry.py | grep -c CUDA_RMS_NORM) \
          $(git show $p:tests/test_rms_norm.py | grep -c 'isinstance(op, RMSNormCudaOp)')
done

git log -S alone does not show the loss, because it happened in a merge.

One deliberate deviation from 4de96a4: its guard required rmsnorm_backward_dw as
well. main's rmsnorm.py no longer calls it, because parameter gradients are now fp32
row contributions plus an ascending left fold, so requiring it would reject a usable
build.

The independent NPU test fix (dropped after the rebase onto test-qwennext)

Earlier revisions of this PR carried a test-only commit that made
rl_engine/tests/test_dispatch.py::test_npu_registry_preserves_per_operator_cpu_fallbacks assert the
invariant its name states (every cpu operator present on npu, each with its CPU fallback, det_gemm
the one NPU-only key). test-qwennext fixes the same test in 88474a9, so the commit was dropped when
this PR was rebased there; the registry change and the construction guard are unaffected.

If the CUDA op was meant to stay out of dispatch

The alternative fix is to change the test instead. There is precedent for leaving CUDA
kernels out of dispatch:

  • CUDA_FUSED_LOGP_SM90 is opt-in via RL_KERNEL_ENABLE_EXPERIMENTAL_SM90_LOGP=1;
  • several SM90 kernels require cc_major == 9.

This PR rests on the history above, not on house style. Happy to switch.

What CI will and will not run

As of 2026-10-01 no CI path executes these tests, before or after merge.

  • On main, CI-Pipeline's linting fails, so unit-tests is skipped.
  • ws1-gtest-gpu and ws1-chain-gpu stop at Configure runpodctl. Their cause is step
    order: runpodctl config --apiKey, run as the first runpodctl call on a fresh
    runner, finds no config file. ws1-gtest-gpu has never succeeded: as of 2026-10-01 it
    has 122 runs, of which 69 failed, 40 were skipped and 13 await approval
    (action_required). A separate fix is being prepared.
  • gpu-ci (label needs-gpu-ci, pull_request_target) got past setup on its last run
    (2026-09-11) but failed later, at pod create. Its pytest tests/ would also stop at
    the aiter collection error.

If those are fixed:

  • ci.yml would run test_dispatch.py but not test_rms_norm.py.
  • ws1-gtest-gpu's C8 sweep (operator_specs.py:339) and ws1-chain-gpu's chain gate
    (qwen3_dense.py:374-396) construct RMSNormCudaOp directly, so the new __init__
    check would run there. Neither calls get_op("rms_norm").
  • gpu-ci would run test_rms_norm.py.

This PR is opened from a fork, so the two push-triggered GPU workflows skip it at PR
time.

Known review items left as they are
  • _require_cuda_symbols (rmsnorm.py:8) is modelled on _require_cuda_activation
    (activation/swiglu.py:30), which hard-codes the two activation symbols. Moving one
    parameterised helper into ops/base.py for both would be a separate refactor.
  • test_dispatch.py:199 pins the NPU-only key set to exactly {"det_gemm"}, so adding
    another NPU-only operator fails this test until it is listed there. That is intended,
    but the line has no comment saying so.
  • The commit ba9b89e has a subject-only message; its rationale is above.
  • 22f2ac3's message is out of date in two places. It says the guard checks three
    symbols; ba9b89e reduced that to the two the op calls. It says "an unbuilt CI" is
    why the failure went unnoticed; "What CI will and will not run" below gives the actual
    reason. History on this branch is not rewritten.

None of these changes behavior. They are left for follow-ups, because any commit here
would have to be merged forward into the three branches stacked on it.

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Review in Change Stack →

Navigate logical layers of code changes, visualize relationships, and explore their blast radius.

📝 Walkthrough

Walkthrough

CUDA RMSNorm now validates that its compiled extension provides the required symbols. The CUDA registry tries this backend before the native RMSNorm backend. Tests cover extension validation, backend selection and fallback, and NPU registry candidates.

Changes

CUDA RMSNorm dispatch

Layer / File(s) Summary
RMSNorm symbol validation
rl_engine/kernels/ops/cuda/norm/rmsnorm.py, tests/test_rms_norm.py
A helper checks extension availability and required symbols. RMSNormCudaOp requires rmsnorm_forward and rmsnorm_backward_dx during construction. Tests cover unavailable extensions and missing symbols.
Registry dispatch and selection tests
rl_engine/kernels/registry.py, tests/test_rms_norm.py, rl_engine/tests/test_dispatch.py
The registry tries CUDA_RMS_NORM before the native RMSNorm backend for CUDA requests. Tests cover CUDA fallback and selection, CPU selection, and NPU registry candidates.

Estimated code review effort: 2 (Simple) | ~12 minutes

Change: Bug fix

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Description Check ✅ Passed Check skipped - CodeRabbit’s high-level summary is enabled.
Title check ✅ Passed The title clearly identifies the main change: restoring CUDA dispatch for rms_norm. The stack and RFC details add context but do not obscure the change.
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⚠️ Outside diff range comments (1)

🟡 Minor · Match the dispatch test to the required symbols. · test_rms_norm.py:20-23

tests/test_rms_norm.py:20-23
🎯 Functional Correctness | 🟡 Minor | ⚡ Quick win

Match the dispatch test to the required symbols.

If a CUDA build has rmsnorm_forward and rmsnorm_backward_dx but lacks rmsnorm_backward_dw, the new construction test accepts it and the registry selects RMSNormCudaOp. This condition instead makes test_registry_dispatches_rms_norm expect NativeRMSNormOp, so that test fails on a usable build. Remove rmsnorm_backward_dw from this condition. The PR also identifies that symbol as unused by this operator. (github.com)

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Review comment at @tests/test_rms_norm.py around lines 20 - 23:
Update the _HAS_CUDA_RMSNORM symbol check used by
test_registry_dispatches_rms_norm to require only rmsnorm_forward and
rmsnorm_backward_dx; remove rmsnorm_backward_dw so the test matches the symbols
needed for RMSNormCudaOp dispatch.

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Outside diff comments:
Review comments at @tests/test_rms_norm.py:
- Around line 20-23: Update the _HAS_CUDA_RMSNORM symbol check used by
test_registry_dispatches_rms_norm to require only rmsnorm_forward and
rmsnorm_backward_dx; remove rmsnorm_backward_dw so the test matches the symbols
needed for RMSNormCudaOp dispatch.

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📒 Files selected for processing (4)
  • rl_engine/kernels/ops/cuda/norm/rmsnorm.py
  • rl_engine/kernels/registry.py
  • rl_engine/tests/test_dispatch.py
  • tests/test_rms_norm.py

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@fusheng-ji fusheng-ji changed the title fix(registry): dispatch rms_norm to the CUDA backend on CUDA [WS1][CUDA][Qwen3-Next] Restore CUDA dispatch for rms_norm (RFC #428 stack 1/4) Oct 4, 2026
@Flink-ddd Flink-ddd added platform: cuda Specific optimizations or bugs in NVIDIA graphics cards (such as FlashInfer, TMA optimizations) new-model qwen WS1 labels Oct 4, 2026
@Flink-ddd
Flink-ddd changed the base branch from main to test-qwennext October 4, 2026 03:40
@Flink-ddd
Flink-ddd deleted the branch RL-Align:test-qwennext October 4, 2026 04:41
@Flink-ddd Flink-ddd closed this Oct 4, 2026
@Flink-ddd Flink-ddd reopened this Oct 4, 2026
`test_registry_dispatches_rms_norm` asserts that the registry resolves
`rms_norm` to `RMSNormCudaOp` whenever CUDA and the compiled kernels are
both present, but `OpBackend` had no CUDA member for this operator and the
CUDA priority list contained only `PYTORCH_NATIVE_RMS_NORM`, so the assert
could never hold. The test therefore fails on any CUDA machine that builds
the native extension, and only passes when `_HAS_CUDA_RMSNORM` is false --
which is why an unbuilt CI has not caught it.

`RMSNormCudaOp` is already a first-class backend elsewhere: it is the
`"cuda"` candidate in `gtest/operator_specs.py` and is used directly by
`attention_preprocess.py`. Only the registry was missing it.

Add `OpBackend.CUDA_RMS_NORM` and put it ahead of the PyTorch reference in
the CUDA priority list. Because `_load_backend` only catches import errors
and this module imports cleanly without `_C`, a CUDA-first list would
otherwise hand out an op that raises at call time on an unbuilt install; so
`RMSNormCudaOp.__init__` now validates the extension and its three symbols,
matching `_require_cuda_activation` in the activation ops. The registry
already treats a backend whose construction raises as unavailable, so the
list degrades to `NativeRMSNormOp` as before.

Only the `cuda` priority map changes; rocm/musa/cpu/npu are untouched.

Verified on 2x B200 (sm_100, driver 580.126.20, torch 2.13.0+cu130) with the
extension rebuilt from source:

  pytest tests/test_rms_norm.py -q
  pytest tests/ rl_engine/tests/ -q -p no:randomly \
      --ignore=tests/test_rocm_aiter_api_contract.py

tests/test_rms_norm.py passes, including test_registry_dispatches_rms_norm, which
fails on the merge-base. The full suite gains no failure. The ignored file fails
to import on the merge-base as well.

Absolute suite counts are reported in the PR description against a named base
commit, not here: they shift whenever a sibling test is added, so a count frozen
in a commit message goes stale the moment the branch is rebased.

Signed-off-by: Wenbo Ji <36562829+fusheng-ji@users.noreply.github.com>
…back

Signed-off-by: Wenbo Ji <36562829+fusheng-ji@users.noreply.github.com>
…ires

Signed-off-by: Wenbo Ji <36562829+fusheng-ji@users.noreply.github.com>
@fusheng-ji
fusheng-ji force-pushed the fix/registry-cuda-rmsnorm-dispatch branch from 40e88bb to 1dd6dbb Compare October 4, 2026 11:19
Comment thread rl_engine/kernels/registry.py
The forward, backward-dx and both backward-dw launchers took the current
CUDA stream without switching to the input's device, so a tensor on cuda:1
while cuda:0 is current launched on the wrong GPU. Add a device guard on
the input's device in each launcher. Use at::cuda::OptionalCUDAGuard with
the headers included unconditionally, as activation.cu does: those
launchers compile in the ROCm build too, where the file's existing
c10::cuda::CUDAGuard stays inside the !USE_ROCM block. A two-device test
checks that the op runs on the input's device and matches the
single-device result.

Signed-off-by: Wenbo Ji <36562829+fusheng-ji@users.noreply.github.com>
@fusheng-ji
fusheng-ji requested a review from bitborne as a code owner October 4, 2026 13:20

@Flink-ddd Flink-ddd left a comment

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LGTM, Thank you.

@Flink-ddd
Flink-ddd merged commit 95914a8 into RL-Align:test-qwennext Oct 6, 2026
2 checks passed
fusheng-ji added a commit to fusheng-ji/RL-Kernel that referenced this pull request Oct 6, 2026
Bring in PR RL-Align#467 at 81eae9e, including test-qwennext at 95914a8 after PR RL-Align#466 merged. The merged tree is identical to cf68fd9; this reconciles the stack ancestry without changing kernel or dispatch behavior.

Signed-off-by: Wenbo Ji <36562829+fusheng-ji@users.noreply.github.com>
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