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Improve / suppress / control overly picky and frequent RR-graph warnings

no-staleExclude issue from being automatically marked as staleExclude issue from being automatically marked as stale

Status: Open.

#2199 In verilog-to-routing/vtr-verilog-to-routing;

· vaughnbetz opened on Nov 11, 2022

Clock routing enhancements

no-staleExclude issue from being automatically marked as staleExclude issue from being automatically marked as stale

VPRVPR FPGA Placement & Routing ToolVPR FPGA Placement & Routing Tool

Status: Open.

#971 In verilog-to-routing/vtr-verilog-to-routing;

· vaughnbetz opened on Sep 19, 2019

Regression Tests should check average/geomean QoR metrics

no-staleExclude issue from being automatically marked as staleExclude issue from being automatically marked as stale

tests

VTR FlowVTR Design Flow (scripts/benchmarks/architectures)VTR Design Flow (scripts/benchmarks/architectures)

Status: Open.

#630 In verilog-to-routing/vtr-verilog-to-routing;

· kmurray opened on May 31, 2019

Benchmarking Enhancements

no-staleExclude issue from being automatically marked as staleExclude issue from being automatically marked as stale

Status: Open.

#546 In verilog-to-routing/vtr-verilog-to-routing;

· rfungquicklogic opened on Apr 26, 2019