Map errno to fixed values #120
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Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
The BADVA reg is referred to with the wrong identifier. The CAUSE reg field of SSR is not yet modeled, we will dump the SSR in a subsequent commit. Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
… and hex_common.py Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
…ags() Signed-off-by: Brian Cain <[email protected]>
needs PRECISE, cause_code Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
These registers are defined in the Qualcomm Hexagon V71 Programmer's Reference Manual - https://docs.qualcomm.com/bundle/publicresource/80-N2040-51_REV_AB_Hexagon_V71_ProgrammerS_Reference_Manual.pdf Refer to §11.9.1 SYSTEM GUEST, §11.9.2 SYSTEM MONITOR. Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Also: add nop TCG overrides for break,unpause,fetchbo,dczeroa break: this hardware breakpoint instruction is used with the in-silicon debugger feature, this is not modeled. unpause: this instruction is used to resume hardware threads that are stalled by pause instructions. pause is modeled as a nop, or in RR mode as an EXCP_YIELD. This instruction is safe to ignore. Since cache/prefetch functions are not modeled, dczero and fetchbo are safe to ignore. Signed-off-by: Brian Cain <[email protected]>
This commit provides handlers to generate TCG for guest and system register reads and writes. They will be leveraged by a future commit. Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Define the register fields for ssr, schedcfg, stid, bestwait, ccr, modectl, imask, ipendad. Define the fields for TLB entries. Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Define TCG overrides for setprio(), crswap(,sgp{0,1,1:0}).
Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Define TCG overrides for {c,}swi {c,s}iad, iassign{r,w}, {s,g}etimask
instructions.
Signed-off-by: Brian Cain <[email protected]>
Define TCG overrides for start, stop, wait, resume instructions. Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Co-authored-by: Sid Manning <[email protected]> Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Matheus Tavares Bernardino <[email protected]>
Signed-off-by: Matheus Tavares Bernardino <[email protected]>
Signed-off-by: Matheus Tavares Bernardino <[email protected]>
Signed-off-by: Matheus Tavares Bernardino <[email protected]>
Signed-off-by: Matheus Tavares Bernardino <[email protected]>
Signed-off-by: Matheus Tavares Bernardino <[email protected]>
Signed-off-by: Matheus Tavares Bernardino <[email protected]>
Signed-off-by: Brian Cain <[email protected]>
Add the #if defined (TARGET_HEXAGON) to hmp-commands-info.hx Prefix each TLB entry with the index Signed-off-by: Taylor Simpson <[email protected]>
Signed-off-by: Marco Liebel <[email protected]>
Signed-off-by: Marco Liebel <[email protected]>
The number of parameters for `DEF_MACRO` changed and needed to be updated too. Signed-off-by: Marco Liebel <[email protected]>
Signed-off-by: Marco Liebel <[email protected]>
Signed-off-by: Marco Liebel <[email protected]>
Signed-off-by: Marco Liebel <[email protected]>
* TODO: forward the instruction tag to the unimp log? * TODO: why do we need_env() for these? * TODO: filter out some attributes? These instructions are unimplemented for now, they are used by h2.
Having these tests enabled causes check-tcg to fail like below
when `--enable-plugins` is provided to configure and `hexagon-softmmu`
is in the target list.
This is probably due to a change in tests/tcg/hexagon/Makefile*, but it's
not yet been identified.
make[1]: *** No rule to make target 'hello', needed by 'run-plugin-hello-with-libbb.so'. Stop.
make[1]: *** Waiting for unfinished jobs....
Link: https://lore.kernel.org/qemu-devel/[email protected]/ Signed-off-by: Brian Cain <[email protected]>
Signed-off-by: Matheus Tavares Bernardino <[email protected]>
Map the errno values to some fixed values, the fixed values can be mapped back in C library's semi-hosting implementation. Signed-off-by: Kushal Pal <[email protected]>
SidManning
reviewed
Aug 19, 2025
| #ifndef CONFIG_USER_ONLY | ||
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| enum { | ||
| TARGET_HEX_EDOM = 33, |
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You said dinkumware has the same ordering but the randomness of this is messy. We should probably address dinkumware. I was unaware dinkumware looked like this.
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I agree, we should fix this in dinkumware first
any idea where these value come from for dinkumware?
can we change them?
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There is no dependency on dinkumware. We received the files from Dinkumware and they have largely been unmodified.
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errno mapping was added here |
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#119 reopened here