wip: reals support

src/hierarchy.rs

@@ -613,6 +613,7 @@ impl HierarchyBuilder {
         }
     }
 
+    #[allow(dead_code)]
     pub fn print_statistics(&self) {
         println!("Duplicate strings: {}", self.duplicate_string_count);
         println!(

src/vcd.rs

@@ -562,7 +562,7 @@ fn read_single_stream_of_values<'a>(
     loop {
         if let Some((pos, cmd)) = reader.next() {
             if (pos + offset) > stop_pos {
-                if let BodyCmd::Time(value) = cmd {
+                if let BodyCmd::Time(_) = cmd {
                     break; // stop before the next time value when we go beyond the stop position
                 }
             }

src/wavemem.rs

@@ -640,7 +640,19 @@ impl SignalEncoder {
                 self.data.extend_from_slice(&value[1..]);
             }
             SignalType::Real => {
-                todo!("Implement real!")
+                assert!(
+                    matches!(value[0], b'r' | b'R'),
+                    "expected a real, not {}",
+                    String::from_utf8_lossy(value)
+                );
+                // parse float
+                let float_value = std::str::from_utf8(&value[1..])
+                    .unwrap()
+                    .parse::<f64>()
+                    .unwrap();
+                // write var-length time index + fixed little endian float bytes
+                leb128::write::unsigned(&mut self.data, time_idx_delta as u64).unwrap();
+                self.data.extend_from_slice(&float_value.to_le_bytes());
             }
         }
         self.prev_time_idx = time_index;

tests/diff_tests.rs

@@ -354,7 +354,7 @@ fn diff_model_sim_cpu_design() {
 }
 
 #[test]
-#[ignore] // TODO: add real support
+#[ignore] // TODO: this file declares a `real` signal and then emits strings ... :(
 fn diff_my_hdl_sigmoid_tb() {
     run_diff_test(
         "inputs/my-hdl/sigmoid_tb.vcd",