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Original file line number | Diff line number | Diff line change |
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@@ -2,7 +2,7 @@ | |
// released under BSD 3-Clause License | ||
// author: Kevin Laeufer <[email protected]> | ||
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use crate::hierarchy::{Hierarchy, SignalLength, SignalRef}; | ||
use crate::hierarchy::{Hierarchy, SignalRef, SignalType}; | ||
use std::collections::HashMap; | ||
use std::fmt::{Debug, Display, Formatter}; | ||
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@@ -206,7 +206,7 @@ impl Waveform { | |
pub fn load_signals(&mut self, ids: &[SignalRef]) { | ||
let ids_with_len = ids | ||
.iter() | ||
.map(|i| (*i, self.hierarchy.get_signal_length(*i).unwrap())) | ||
.map(|i| (*i, self.hierarchy.get_signal_tpe(*i).unwrap())) | ||
.collect::<Vec<_>>(); | ||
let signals = self.source.load_signals(&ids_with_len); | ||
// the signal source must always return the correct number of signals! | ||
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@@ -303,7 +303,7 @@ impl SignalChangeData { | |
pub(crate) trait SignalSource { | ||
/// Loads new signals. | ||
/// Many implementations take advantage of loading multiple signals at a time. | ||
fn load_signals(&mut self, ids: &[(SignalRef, SignalLength)]) -> Vec<Signal>; | ||
fn load_signals(&mut self, ids: &[(SignalRef, SignalType)]) -> Vec<Signal>; | ||
/// Returns the global time table which stores the time at each value change. | ||
fn get_time_table(&self) -> Vec<Time>; | ||
} | ||
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Original file line number | Diff line number | Diff line change |
---|---|---|
|
@@ -3,9 +3,7 @@ | |
// author: Kevin Laeufer <[email protected]> | ||
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use std::io::{BufRead, BufReader}; | ||
use waveform::{ | ||
Hierarchy, HierarchyItem, ScopeType, SignalLength, SignalRef, TimescaleUnit, VarType, Waveform, | ||
}; | ||
use waveform::{Hierarchy, HierarchyItem, ScopeType, SignalRef, TimescaleUnit, VarType, Waveform}; | ||
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fn run_diff_test(vcd_filename: &str, fst_filename: &str) { | ||
{ | ||
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@@ -127,8 +125,8 @@ fn diff_hierarchy_item(ref_item: &vcd::ScopeItem, our_item: HierarchyItem, our_h | |
waveform_var_type_to_string(our_var.var_type()) | ||
); | ||
match our_var.length() { | ||
SignalLength::Variable => {} // nothing to check | ||
SignalLength::Fixed(size) => assert_eq!(ref_var.size, size.get()), | ||
None => {} // nothing to check | ||
Some(size) => assert_eq!(ref_var.size, size), | ||
} | ||
match ref_var.index { | ||
None => assert!(our_var.index().is_none()), | ||
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@@ -355,6 +353,15 @@ fn diff_model_sim_cpu_design() { | |
); | ||
} | ||
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#[test] | ||
#[ignore] // TODO: add real support | ||
fn diff_my_hdl_sigmoid_tb() { | ||
run_diff_test( | ||
"inputs/my-hdl/sigmoid_tb.vcd", | ||
"inputs/my-hdl/sigmoid_tb.vcd.fst", | ||
); | ||
} | ||
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#[test] | ||
fn diff_treadle_gcd() { | ||
run_diff_test("inputs/treadle/GCD.vcd", "inputs/treadle/GCD.vcd.fst"); | ||
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