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2 changes: 1 addition & 1 deletion src/address_space/backend/alloc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -46,7 +46,7 @@ impl<H: PagingHandler> Backend<H> {
|_va| PhysAddr::from(0),
size,
MappingFlags::empty(),
false,
true,
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It is ok to use 2MB paging in map_linear

BUT in map_alloc, how to handle 2MB page fault for mappings without populated flag?

I believe that there is a way, BUT not well supported in current page_table_multiarch

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Agree. I think a co-design is necessary.

false,
)
.is_ok()
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2 changes: 1 addition & 1 deletion src/address_space/backend/linear.rs
Original file line number Diff line number Diff line change
Expand Up @@ -32,7 +32,7 @@ impl<H: PagingHandler> Backend<H> {
|va| PhysAddr::from(va.as_usize() - pa_va_offset),
size,
flags,
false,
true,
false,
)
.is_ok()
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