[Versal]: Fix Transceiver reset not working during the first power-up #1972
Conversation
This file contains hidden or bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
bluncan
requested review from
AndrDragomir,
AndreiGrozav,
FilipG24,
IuliaCMoldovan,
LBFFilho,
PopPaul2021,
acostina,
gastmaier and
sarpadi
as code owners
bluncan
force-pushed
the
fix_versal_cold_boot_reset
branch
from
5be2ae9 to
fdb2e88
Compare
bluncan
force-pushed
the
fix_versal_cold_boot_reset
branch
from
fdb2e88 to
0d8b255
Compare
The first time the board is powered on, because the reference clock going to the transceivers is not stable until the clock chip is programmerd, the LCPLLs are being locked wrong and the master reset controller inside the QUADs gets stuck. The fix is to manually reset the LCPLLs and ILOs inside the QUAD after the clock chip is programmed. Signed-off-by: Bogdan Luncan <[email protected]>
bluncan
force-pushed
the
fix_versal_cold_boot_reset
branch
from
0d8b255 to
e264dbc
Compare
Signed-off-by: Bogdan Luncan <[email protected]>
Signed-off-by: Bogdan Luncan <[email protected]>
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
PR Description
On Versal systems, the transceiver reset procedure is done using a master reset controller block found inside the AMD provided PHY. However, during the first boot of the board, because the clock chip (e.g. hmc7044) is not programmed before configuring the FPGA fabric, the LCPLLs found inside the QUAD get stuck or are locking on the wrong frequency and the reset controller gets stuck and no longer responds to the reset gpios.
To fix this, we have to manually reset the LCPLLs after the clock chip has been programed and it's output clocks are stable.
PR Type
PR Checklist