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support f128 arguments in riscv self-hosted backend #23375

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rootbeer opened this issue Mar 26, 2025 · 3 comments
Open

support f128 arguments in riscv self-hosted backend #23375

rootbeer opened this issue Mar 26, 2025 · 3 comments
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arch-riscv 32-bit and 64-bit RISC-V backend-self-hosted bug Observed behavior contradicts documented or intended behavior
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@rootbeer
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rootbeer commented Mar 26, 2025

Zig Version

0.15.0-dev.131+3b25bf47d

Steps to Reproduce and Observed Behavior

Create a test.zig:

fn op(f: f128) u128 {
    return @bitCast(f);
}

pub fn main() !void {
    _ = op(1.0);
}

Compile with:

$ zig build-exe test.zig -target riscv64-linux-musl -fno-llvm

Get something like:

thread 1159684 panic: reached unreachable code
/home/pat/projects/ziglang/zig/src/arch/riscv64/abi.zig:152:13: 0x78ddecd in classifySystem (zig)
            unreachable; // support split float args
            ^
/home/pat/projects/ziglang/zig/src/arch/riscv64/CodeGen.zig:8301:64: 0x7d347ab in resolveCallingConventionValues (zig)
                const classes = mem.sliceTo(&abi.classifySystem(ty, zcu), .none);
                                                               ^
/home/pat/projects/ziglang/zig/src/arch/riscv64/CodeGen.zig:829:60: 0x7a2c554 in generate (zig)
    var call_info = function.resolveCallingConventionValues(fn_info, &.{}) catch |err| switch (err) {
                                                           ^
/home/pat/projects/ziglang/zig/src/codegen.zig:69:51: 0x76e59ff in generateFunction (zig)
            return importBackend(backend).generate(lf, pt, src_loc, func_index, air, liveness, code, debug_output);
                                                  ^
/home/pat/projects/ziglang/zig/src/link/Elf/ZigObject.zig:1440:33: 0x76e6212 in updateFunc (zig)
    try codegen.generateFunction(
                                ^
/home/pat/projects/ziglang/zig/src/link/Elf.zig:2380:44: 0x729cf27 in updateFunc (zig)
    return self.zigObjectPtr().?.updateFunc(self, pt, func_index, air, liveness);

The unreachable is:

        .float => {
            const target = zcu.getTarget();
            const features = target.cpu.features;

            const float_bits = ty.floatBits(zcu.getTarget());
            const float_reg_size: u32 = if (std.Target.riscv.featureSetHas(features, .d)) 64 else 32;
            if (float_bits <= float_reg_size) {
                result[0] = .float;
                return result;
            }
            unreachable; // support split float args
        },

In classifySystem.

Changing the f128 to f64 avoids the crash. As does inlining the code in main. Or dropping the -fno-llvm option. Or switching the targe to x86_64-linux-musl. The aarch64-linux-musl also crashes the compiler (different reason, I think?).

I ran into this on #23357 (see https://github.com/ziglang/zig/actions/runs/14071605497/job/39406816135?pr=23357). That PR has changes to isInf that caused the pre-existing "comptime fixed-width float non-zero divided by zero produces signed Inf" test in floatop.zig to start failing. Not clear to me why the existing code (which has an f128 @bitCast too) wasn't triggering this.

Expected Behavior

Compiles the code without crashing.

@rootbeer rootbeer added the bug Observed behavior contradicts documented or intended behavior label Mar 26, 2025
@Rexicon226
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I wouldn't consider the RISC-V backend close enough to completion to warrant opening issues for TODOs yet. I have a branch where I am fully rewriting it from scratch, but that is still some time away from being completed, as I have little time to work on it at the moment.

Please feel free to just skip tests that fail for now.
Insert,

if (builtin.zig_backend == .stage2_riscv64) return error.SkipZigTest;

into the top of the test.

The aarch64-linux-musl also crashes the compiler (different reason, I think?).

The aarch64 self-hosted backend is also very far from completion, and is bitrotten beyond even compiling a hello world program.

@rootbeer
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Ah, feel free to close this if there isn't any value at this point in the backend's development.

If the RISC-V backend is so far from completion, then maybe it shouldn't be part of the pre-submit tests?

@alexrp
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alexrp commented Mar 26, 2025

If the RISC-V backend is so far from completion, then maybe it shouldn't be part of the pre-submit tests?

We do want to know if changes in the frontend, linker, etc regress it.

@alexrp alexrp added arch-riscv 32-bit and 64-bit RISC-V backend-self-hosted labels Mar 26, 2025
@alexrp alexrp added this to the 0.16.0 milestone Mar 26, 2025
@alexrp alexrp changed the title compiler hits "unreachable" with f128 on riscv64-linux-musl -fno-llvm support f128 arguments in riscv self-hosted backend Mar 27, 2025
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