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riscv64 freestanding: invalid generated assembly for an inlined mulX function

arch-riscv32-bit and 64-bit RISC-V32-bit and 64-bit RISC-V

bugObserved behavior contradicts documented or intended behaviorObserved behavior contradicts documented or intended behavior

compiler-rt

contributor friendlyThis issue is limited in scope and/or knowledge of Zig internals.This issue is limited in scope and/or knowledge of Zig internals.

Status: Open.

#24619 In ziglang/zig;

· gballet opened on Jul 29, 2025

· 

upcoming

Tracking issue for the LLVM 22 upgrade

arch-arm32-bit ARM32-bit ARM

arch-avr8-bit AVR8-bit AVR

arch-powerpc32-bit and 64-bit Power ISA32-bit and 64-bit Power ISA

arch-riscv32-bit and 64-bit RISC-V32-bit and 64-bit RISC-V

arch-s390x64-bit IBM z/Architecture64-bit IBM z/Architecture

arch-sparc32-bit and 64-bit SPARC32-bit and 64-bit SPARC

arch-wasm32-bit and 64-bit WebAssembly32-bit and 64-bit WebAssembly

arch-xtensaTensilica XtensaTensilica Xtensa

backend-llvmThe LLVM backend outputs an LLVM IR Module.The LLVM backend outputs an LLVM IR Module.

enhancementSolving this issue will likely involve adding new logic or components to the codebase.Solving this issue will likely involve adding new logic or components to the codebase.

os-aixIBM AIXIBM AIX

os-uefi

os-zosIBM z/OSIBM z/OS

zig ccZig as a drop-in C compiler featureZig as a drop-in C compiler feature

Status: Open.

#24542 In ziglang/zig;

· alexrp opened on Jul 22, 2025

· 

upcoming

Unable to build Zig on riscv64gc-linux-musl

arch-riscv32-bit and 64-bit RISC-V32-bit and 64-bit RISC-V

bugObserved behavior contradicts documented or intended behaviorObserved behavior contradicts documented or intended behavior

os-linux

Status: Open.

#24508 In ziglang/zig;

· bwbuhse opened on Jul 19, 2025

<code>stack_iterator</code> standalone test fails on <code>riscv64-linux</code>

arch-riscv32-bit and 64-bit RISC-V32-bit and 64-bit RISC-V

bugObserved behavior contradicts documented or intended behaviorObserved behavior contradicts documented or intended behavior

os-linux

Status: Open.

#24310 In ziglang/zig;

· alexrp opened on Jun 30, 2025

· 

upcoming

<code>runtime_shrExact_overflow</code> langref test fails on RISC-V

arch-riscv32-bit and 64-bit RISC-V32-bit and 64-bit RISC-V

backend-llvmThe LLVM backend outputs an LLVM IR Module.The LLVM backend outputs an LLVM IR Module.

docs

miscompilationThe compiler reports success but produces semantically incorrect code.The compiler reports success but produces semantically incorrect code.

upstreamAn issue with a third party project that Zig uses.An issue with a third party project that Zig uses.

Status: Open.

#24304 In ziglang/zig;

· alexrp opened on Jun 30, 2025

· 

unplanned

<code>vector division operators</code> behavior test fails on RISC-V with vector support enabled

arch-riscv32-bit and 64-bit RISC-V32-bit and 64-bit RISC-V

backend-llvmThe LLVM backend outputs an LLVM IR Module.The LLVM backend outputs an LLVM IR Module.

bugObserved behavior contradicts documented or intended behaviorObserved behavior contradicts documented or intended behavior

miscompilationThe compiler reports success but produces semantically incorrect code.The compiler reports success but produces semantically incorrect code.

upstreamAn issue with a third party project that Zig uses.An issue with a third party project that Zig uses.

Status: Open.

#24301 In ziglang/zig;

· alexrp opened on Jun 30, 2025

· 

unplanned

<code>bit_set.decltest.IntegerBitSet</code> fails on RISC-V with vector support enabled

arch-riscv32-bit and 64-bit RISC-V32-bit and 64-bit RISC-V

backend-llvmThe LLVM backend outputs an LLVM IR Module.The LLVM backend outputs an LLVM IR Module.

bugObserved behavior contradicts documented or intended behaviorObserved behavior contradicts documented or intended behavior

miscompilationThe compiler reports success but produces semantically incorrect code.The compiler reports success but produces semantically incorrect code.

upstreamAn issue with a third party project that Zig uses.An issue with a third party project that Zig uses.

Status: Open.

#24300 In ziglang/zig;

· alexrp opened on Jun 30, 2025

· 

unplanned

<code>std.crypto.salsa20</code> tests fail on RISC-V with vector support enabled

arch-riscv32-bit and 64-bit RISC-V32-bit and 64-bit RISC-V

backend-llvmThe LLVM backend outputs an LLVM IR Module.The LLVM backend outputs an LLVM IR Module.

bugObserved behavior contradicts documented or intended behaviorObserved behavior contradicts documented or intended behavior

miscompilationThe compiler reports success but produces semantically incorrect code.The compiler reports success but produces semantically incorrect code.

upstreamAn issue with a third party project that Zig uses.An issue with a third party project that Zig uses.

Status: Open.

#24299 In ziglang/zig;

· alexrp opened on Jun 30, 2025

· 

unplanned

Prefer <code>SYS_riscv_hwprobe</code> over parsing <code>/proc/cpuinfo</code>

arch-riscv32-bit and 64-bit RISC-V32-bit and 64-bit RISC-V

enhancementSolving this issue will likely involve adding new logic or components to the codebase.Solving this issue will likely involve adding new logic or components to the codebase.

os-linux

standard libraryThis issue involves writing Zig code for the standard library.This issue involves writing Zig code for the standard library.

Status: Open.

#24291 In ziglang/zig;

· alexrp opened on Jun 29, 2025

· 

upcoming

riscv64: TODO: airBitCast [3]u8 to u24

arch-riscv32-bit and 64-bit RISC-V32-bit and 64-bit RISC-V

backend-self-hosted

bugObserved behavior contradicts documented or intended behaviorObserved behavior contradicts documented or intended behavior

Status: Open.

#24141 In ziglang/zig;

· RetroDev256 opened on Jun 10, 2025

· 

upcoming

Tier System: <code>riscv64-openbsd</code>

arch-riscv32-bit and 64-bit RISC-V32-bit and 64-bit RISC-V

enhancementSolving this issue will likely involve adding new logic or components to the codebase.Solving this issue will likely involve adding new logic or components to the codebase.

os-openbsd

tier systemIssues that track the support tier for a platform.Issues that track the support tier for a platform.

Status: Open.

#23777 In ziglang/zig;

· alexrp opened on May 4, 2025

· 

upcoming

Tier System: <code>riscv64-netbsd</code>

arch-riscv32-bit and 64-bit RISC-V32-bit and 64-bit RISC-V

enhancementSolving this issue will likely involve adding new logic or components to the codebase.Solving this issue will likely involve adding new logic or components to the codebase.

os-netbsd

tier systemIssues that track the support tier for a platform.Issues that track the support tier for a platform.

Status: Open.

#23769 In ziglang/zig;

· alexrp opened on May 4, 2025

· 

upcoming