@@ -18,18 +18,17 @@ LOG_MODULE_REGISTER(nxp_sc18is606_gpio, CONFIG_GPIO_LOG_LEVEL);
1818
1919#include "spi/spi_sc18is606.h"
2020
21- #define SC18IS606_GPIO_MAX_PINS 3
21+ #define SC18IS606_GPIO_MAX_PINS 3
2222
23- #define SC18IS606_GPIO_WRITE 0xF4
24- #define SC18IS606_GPIO_READ 0xF5
25- #define SC18IS606_GPIO_ENABLE 0xF6
26- #define SC18IS606_GPIO_CONF 0xF7
23+ #define SC18IS606_GPIO_WRITE 0xF4
24+ #define SC18IS606_GPIO_READ 0xF5
25+ #define SC18IS606_GPIO_ENABLE 0xF6
26+ #define SC18IS606_GPIO_CONF 0xF7
2727
28-
29- #define SC18IS606_GPIO_CONF_INPUT 0x00
30- #define SC18IS606_GPIO_CONF_PUSH_PULL 0x01
31- #define SC18IS606_GPIO_CONF_OPEN_DRAIN 0x03
32- #define SC18IS606_GPIO_CONF_MASK 0x03
28+ #define SC18IS606_GPIO_CONF_INPUT 0x00
29+ #define SC18IS606_GPIO_CONF_PUSH_PULL 0x01
30+ #define SC18IS606_GPIO_CONF_OPEN_DRAIN 0x03
31+ #define SC18IS606_GPIO_CONF_MASK 0x03
3332
3433struct gpio_sc18is606_config {
3534 struct gpio_driver_config common ;
@@ -47,19 +46,19 @@ struct gpio_sc18is606_data {
4746 uint8_t conf ;
4847};
4948
50-
51- static int gpio_sc18is606_port_set_raw ( const struct device * port ,
52- uint8_t mask , uint8_t value , uint8_t toggle ) {
49+ static int gpio_sc18is606_port_set_raw ( const struct device * port , uint8_t mask , uint8_t value ,
50+ uint8_t toggle )
51+ {
5352 const struct gpio_sc18is606_config * cfg = port -> config ;
5453 struct gpio_sc18is606_data * data = port -> data ;
5554
56- uint8_t buf [] = {
55+ uint8_t buf [] = {
5756 SC18IS606_GPIO_WRITE ,
5857 data -> output_state ,
5958 };
6059 int ret ;
6160
62- if (k_is_in_isr ()) {
61+ if (k_is_in_isr ()) {
6362 return - EWOULDBLOCK ;
6463 }
6564
@@ -69,7 +68,7 @@ static int gpio_sc18is606_port_set_raw(const struct device *port,
6968
7069 ret = nxp_sc18is606_transfer (cfg -> bridge , buf , sizeof (buf ), NULL , 0 , NULL );
7170
72- if (ret < 0 ) {
71+ if (ret < 0 ) {
7372 LOG_ERR ("Failed to write to GPIO (%d)" , ret );
7473 return ret ;
7574 }
@@ -80,7 +79,7 @@ static int gpio_sc18is606_port_set_raw(const struct device *port,
8079}
8180
8281static int gpio_sc18is606_pin_configure (const struct device * port , gpio_pin_t pin ,
83- gpio_flags_t flags )
82+ gpio_flags_t flags )
8483{
8584 const struct gpio_sc18is606_config * cfg = port -> config ;
8685 struct gpio_sc18is606_data * data = port -> data ;
@@ -92,24 +91,29 @@ static int gpio_sc18is606_pin_configure(const struct device *port, gpio_pin_t pi
9291 0x00 ,
9392 };
9493
95- if (pin >= SC18IS606_GPIO_MAX_PINS ) {
94+ uint8_t enable_buf [] = {
95+ SC18IS606_GPIO_ENABLE ,
96+ pin ,
97+ };
98+
99+ if (pin >= SC18IS606_GPIO_MAX_PINS ) {
96100 return - EINVAL ;
97101 }
98102
99- if (flags & (GPIO_PULL_UP | GPIO_PULL_DOWN )) {
103+ if (flags & (GPIO_PULL_UP | GPIO_PULL_DOWN )) {
100104 return - ENOTSUP ;
101105 }
102106
103- if (flags & GPIO_INPUT ) {
107+ if (flags & GPIO_INPUT ) {
104108 pin_conf = SC18IS606_GPIO_CONF_INPUT ;
105109 } else if (flags & GPIO_OUTPUT ) {
106110 if (flags & GPIO_SINGLE_ENDED ) {
107- if (flags & GPIO_LINE_OPEN_DRAIN ) {
111+ if (flags & GPIO_LINE_OPEN_DRAIN ) {
108112 pin_conf = SC18IS606_GPIO_CONF_OPEN_DRAIN ;
109113 } else {
110114 return - ENOTSUP ;
111115 }
112- } else {
116+ } else {
113117 pin_conf = SC18IS606_GPIO_CONF_PUSH_PULL ;
114118 }
115119 } else {
@@ -118,50 +122,54 @@ static int gpio_sc18is606_pin_configure(const struct device *port, gpio_pin_t pi
118122 }
119123
120124 ret = nxp_sc18is606_claim (cfg -> bridge );
121- if (ret < 0 ) {
125+ if (ret < 0 ) {
122126 LOG_ERR ("Failed to claim the bridge (%d)" , ret );
123127 return ret ;
124128 }
125129
126- data -> conf |= pin_conf << (pin * 2 );
130+ ret = nxp_sc18is606_transfer (cfg -> bridge , enable_buf , sizeof (enable_buf ), NULL , 0 , NULL );
131+ if (ret < 0 ) {
132+ LOG_ERR ("Failed to enable GPIO (%d)" , ret );
133+ }
134+
135+ data -> conf |= pin_conf << ((pin * 2 ) + 1 );
127136 buf [1 ] = data -> conf ;
128137
129138 ret = nxp_sc18is606_transfer (cfg -> bridge , buf , sizeof (buf ), NULL , 0 , NULL );
130- if (ret < 0 ) {
139+ if (ret < 0 ) {
131140 LOG_ERR ("Failed to configure GPIO (%d)" , ret );
132141 }
133142
134- if (ret == 0 && flags & GPIO_OUTPUT ) {
135- if (flags & GPIO_OUTPUT_INIT_HIGH ) {
143+ if (ret == 0 && flags & GPIO_OUTPUT ) {
144+ if (flags & GPIO_OUTPUT_INIT_HIGH ) {
136145 gpio_sc18is606_port_set_raw (port , BIT (pin ), BIT (pin ), 0 );
137146 }
138- if (flags & GPIO_OUTPUT_INIT_LOW ) {
147+ if (flags & GPIO_OUTPUT_INIT_LOW ) {
139148 gpio_sc18is606_port_set_raw (port , BIT (pin ), 0 , 0 );
140149 }
141150 }
142151
143152 nxp_sc18is606_release (cfg -> bridge );
144153
145-
146154 return ret ;
147155}
148156
149157static int gpio_sc18is606_port_get_raw (const struct device * port , gpio_port_value_t * value )
150158{
151159 const struct gpio_sc18is606_config * cfg = port -> config ;
152160
153- uint8_t buf [] = {
161+ uint8_t buf [] = {
154162 SC18IS606_GPIO_READ ,
155163 };
156164 uint8_t data ;
157165 int ret ;
158166
159- if (k_is_in_isr ()) {
167+ if (k_is_in_isr ()) {
160168 return - EWOULDBLOCK ;
161169 }
162170
163171 ret = nxp_sc18is606_transfer (cfg -> bridge , buf , sizeof (buf ), & data , 1 , NULL );
164- if (ret < 0 ) {
172+ if (ret < 0 ) {
165173 LOG_ERR ("Failed to read GPIO state(%d)" , ret );
166174 return ret ;
167175 }
@@ -171,9 +179,8 @@ static int gpio_sc18is606_port_get_raw(const struct device *port, gpio_port_valu
171179 return 0 ;
172180}
173181
174- static int gpio_sc18is606_port_set_masked_raw (const struct device * port ,
175- gpio_port_pins_t mask ,
176- gpio_port_value_t value )
182+ static int gpio_sc18is606_port_set_masked_raw (const struct device * port , gpio_port_pins_t mask ,
183+ gpio_port_value_t value )
177184{
178185 return gpio_sc18is606_port_set_raw (port , (uint8_t )mask , (uint8_t )value , 0 );
179186}
@@ -196,15 +203,14 @@ static int gpio_sc18is606_init(const struct device *dev)
196203{
197204 const struct gpio_sc18is606_config * cfg = dev -> config ;
198205
199- if (!device_is_ready (cfg -> bridge )) {
206+ if (!device_is_ready (cfg -> bridge )) {
200207 LOG_ERR ("Parent device not ready" );
201208 return - ENODEV ;
202209 }
203210
204211 return 0 ;
205212}
206213
207-
208214static DEVICE_API (gpio , gpio_sc18is606_driver_api ) = {
209215 .pin_configure = gpio_sc18is606_pin_configure ,
210216 .port_get_raw = gpio_sc18is606_port_get_raw ,
@@ -214,27 +220,25 @@ static DEVICE_API(gpio, gpio_sc18is606_driver_api) = {
214220 .port_toggle_bits = gpio_sc18is606_port_toggle_bits ,
215221};
216222
217-
218- #define CHECK_COMPAT (node ) \
223+ #define CHECK_COMPAT (node ) \
219224 COND_CODE_1(DT_NODE_HAS_COMPAT(node, nxp_sc18is606_spi), (DEVICE_DT_GET(node)), ())
220225
221- #define GPIO_SC18IS606_SPI_SIBLING (n ) \ DT_FOREACH_CHILD_STATUS_OKAY(DT_INST_PARENT(n), CHECK_COMPAT)
222-
223- #define GPIO_SC18IS606_DEFINE (inst ) \ static const struct gpio_sc18is606_config gpio_sc18is606_config##inst = { \
224- .common = { \
225- .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(inst), \
226- }, \
227- .bridge = GPIO_SC18IS606_SPI_SIBLING(inst), \
228- }; \
229- static struct gpio_sc18is606_data gpio_sc18is606_data##inst = { \
230- .conf = 0x00, \
231- }; \
232- \
233- DEVICE_DT_INST_DEFINE(inst, gpio_sc18is606_init, NULL, \
234- &gpio_sc18is606_data##inst, &gpio_sc18is606_config_##inst, \
235- POST_KERNEL, CONFIG_GPIO_SC18IS606_INIT_PRIORITY, \
236- &gpio_sc18is606_driver_api);
226+ #define GPIO_SC18IS606_SPI_SIBLING (n ) DT_FOREACH_CHILD_STATUS_OKAY(DT_INST_PARENT(n), CHECK_COMPAT)
227+
228+ #define GPIO_SC18IS606_DEFINE (inst ) \
229+ static const struct gpio_sc18is606_config gpio_sc18is606_config##inst = { \
230+ .common = \
231+ { \
232+ .port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(inst), \
233+ }, \
234+ .bridge = GPIO_SC18IS606_SPI_SIBLING(inst), \
235+ }; \
236+ static struct gpio_sc18is606_data gpio_sc18is606_data##inst = { \
237+ .conf = 0x00, \
238+ }; \
239+ \
240+ DEVICE_DT_INST_DEFINE(inst, gpio_sc18is606_init, NULL, &gpio_sc18is606_data##inst, \
241+ &gpio_sc18is606_config##inst, POST_KERNEL, \
242+ CONFIG_GPIO_SC18IS606_INIT_PRIORITY, &gpio_sc18is606_driver_api);
237243
238244DT_INST_FOREACH_STATUS_OKAY (GPIO_SC18IS606_DEFINE );
239-
240-
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