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drivers: gpio: Introduce SC18IS606 GPIO Controller
Added a driver implementation for the GPIO Controller on the sc18is606 Signed-off-by: Zacck Osiemo <[email protected]>
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‎drivers/gpio/CMakeLists.txt‎

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@@ -143,3 +143,8 @@ if(CONFIG_GPIO_SC18IM704)
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zephyr_library_include_directories(${ZEPHYR_BASE}/drivers)
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zephyr_library_sources(gpio_sc18im704.c)
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endif()
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if(CONFIG_GPIO_SC18IS606)
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zephyr_library_include_directories(${ZEPHYR_BASE}/drivers)
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zephyr_library_sources(gpio_sc18is606.c)
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endif()

‎drivers/gpio/Kconfig‎

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@@ -183,6 +183,7 @@ source "drivers/gpio/Kconfig.rzt2m"
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source "drivers/gpio/Kconfig.sam"
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source "drivers/gpio/Kconfig.sam0"
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source "drivers/gpio/Kconfig.sc18im704"
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source "drivers/gpio/Kconfig.sc18is606"
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source "drivers/gpio/Kconfig.sedi"
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source "drivers/gpio/Kconfig.sf32lb"
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source "drivers/gpio/Kconfig.si32"

‎drivers/gpio/Kconfig.sc18is606‎

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# Copyright (c) 2025 tinyvision.ai
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# SPDX-License-Identifier: Apache-2.0
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config GPIO_SC18IS606
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bool "NXP SC18IS606 GPIO Controller driver"
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default y
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depends on SPI_SC18IS606
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depends on DT_HAS_NXP_SC18IS606_GPIO_ENABLED
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help
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Enables NXP SC18IS606 gpio controller driver
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config GPIO_SC18IS606_INIT_PRIORITY
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int "SC18IS606 GPIO Init Priority"
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default 66
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depends on GPIO_SC18IS606
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help
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SC18IS606 GPIO Controller Init priority
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Note: Has to be greater than the parent SC18IS606 bridge init priority
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‎drivers/gpio/gpio_sc18is606.c‎

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/*
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* Copyright (c), 2025 tinyvision.io
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#define DT_DRV_COMPAT nxp_sc18is606_gpio
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#include <errno.h>
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#include <zephyr/kernel.h>
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#include <zephyr/device.h>
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#include <zephyr/init.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/drivers/gpio/gpio_utils.h>
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(nxp_sc18is606_gpio, CONFIG_GPIO_LOG_LEVEL);
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#include "spi/spi_sc18is606.h"
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#define SC18IS606_GPIO_MAX_PINS 3
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#define SC18IS606_GPIO_WRITE 0xF4
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#define SC18IS606_GPIO_READ 0xF5
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#define SC18IS606_GPIO_ENABLE 0xF6
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#define SC18IS606_GPIO_CONF 0xF7
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#define SC18IS606_GPIO_CONF_INPUT 0x00
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#define SC18IS606_GPIO_CONF_PUSH_PULL 0x01
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#define SC18IS606_GPIO_CONF_OPEN_DRAIN 0x03
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#define SC18IS606_GPIO_CONF_MASK 0x03
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struct gpio_sc18is606_config {
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struct gpio_driver_config common;
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const struct device *bridge;
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};
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struct gpio_sc18is606_data {
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struct gpio_driver_data sc18is606_data;
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/*current port state*/
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uint8_t output_state;
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/*current port pin config*/
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uint8_t conf;
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};
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static int gpio_sc18is606_port_set_raw(const struct device *port,
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uint8_t mask, uint8_t value, uint8_t toggle) {
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const struct gpio_sc18is606_config *cfg = port->config;
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struct gpio_sc18is606_data *data = port->data;
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uint8_t buf[] = {
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SC18IS606_GPIO_WRITE,
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data->output_state,
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};
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int ret;
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if(k_is_in_isr()) {
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return -EWOULDBLOCK;
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}
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buf[1] &= ~mask;
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buf[1] |= (value & mask);
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buf[1] ^= toggle;
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ret = nxp_sc18is606_transfer(cfg->bridge, buf, sizeof(buf), NULL, 0, NULL);
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if(ret < 0) {
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LOG_ERR("Failed to write to GPIO (%d)", ret);
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return ret;
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}
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data->output_state = buf[1];
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return 0;
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}
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static int gpio_sc18is606_pin_configure(const struct device *port, gpio_pin_t pin,
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gpio_flags_t flags)
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{
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const struct gpio_sc18is606_config *cfg = port->config;
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struct gpio_sc18is606_data *data = port->data;
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uint8_t pin_conf;
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int ret;
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uint8_t buf[] = {
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SC18IS606_GPIO_CONF,
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0x00,
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};
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if(pin >= SC18IS606_GPIO_MAX_PINS) {
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return -EINVAL;
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}
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if(flags & (GPIO_PULL_UP | GPIO_PULL_DOWN)) {
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return -ENOTSUP;
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}
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if(flags & GPIO_INPUT) {
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pin_conf = SC18IS606_GPIO_CONF_INPUT;
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} else if (flags & GPIO_OUTPUT) {
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if (flags & GPIO_SINGLE_ENDED) {
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if(flags & GPIO_LINE_OPEN_DRAIN) {
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pin_conf = SC18IS606_GPIO_CONF_OPEN_DRAIN;
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} else {
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return -ENOTSUP;
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}
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} else {
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pin_conf = SC18IS606_GPIO_CONF_PUSH_PULL;
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}
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} else {
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/*Impossible option*/
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return -ENOTSUP;
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}
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ret = nxp_sc18is606_claim(cfg->bridge);
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if(ret < 0) {
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LOG_ERR("Failed to claim the bridge (%d)", ret);
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return ret;
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}
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data->conf |= pin_conf << (pin * 2);
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buf[1] = data->conf;
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ret = nxp_sc18is606_transfer(cfg->bridge, buf, sizeof(buf), NULL, 0, NULL);
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if(ret < 0) {
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LOG_ERR("Failed to configure GPIO (%d)", ret);
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}
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if(ret == 0 && flags & GPIO_OUTPUT) {
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if(flags & GPIO_OUTPUT_INIT_HIGH) {
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gpio_sc18is606_port_set_raw(port, BIT(pin), BIT(pin), 0);
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}
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if(flags & GPIO_OUTPUT_INIT_LOW) {
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gpio_sc18is606_port_set_raw(port, BIT(pin), 0, 0);
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}
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}
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nxp_sc18is606_release(cfg->bridge);
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return ret;
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}
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static int gpio_sc18is606_port_get_raw(const struct device *port, gpio_port_value_t *value)
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{
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const struct gpio_sc18is606_config *cfg = port->config;
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uint8_t buf[] = {
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SC18IS606_GPIO_READ,
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};
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uint8_t data;
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int ret;
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if(k_is_in_isr()) {
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return -EWOULDBLOCK;
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}
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ret = nxp_sc18is606_transfer(cfg->bridge, buf, sizeof(buf), &data, 1, NULL);
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if(ret < 0) {
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LOG_ERR("Failed to read GPIO state(%d)", ret);
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return ret;
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}
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*value = data;
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return 0;
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}
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static int gpio_sc18is606_port_set_masked_raw(const struct device *port,
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gpio_port_pins_t mask,
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gpio_port_value_t value)
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{
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return gpio_sc18is606_port_set_raw(port, (uint8_t)mask, (uint8_t)value, 0);
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}
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static int gpio_sc18is606_port_set_bits_raw(const struct device *port, gpio_port_pins_t pins)
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{
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return gpio_sc18is606_port_set_raw(port, (uint8_t)pins, (uint8_t)pins, 0);
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}
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static int gpio_sc18is606_port_clear_bits_raw(const struct device *port, gpio_port_pins_t pins)
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{
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return gpio_sc18is606_port_set_raw(port, (uint8_t)pins, 0, 0);
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}
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static int gpio_sc18is606_port_toggle_bits(const struct device *port, gpio_port_pins_t pins)
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{
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return gpio_sc18is606_port_set_raw(port, 0, 0, (uint8_t)pins);
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}
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static int gpio_sc18is606_init(const struct device *dev)
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{
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const struct gpio_sc18is606_config *cfg = dev->config;
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if(!device_is_ready(cfg->bridge)) {
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LOG_ERR("Parent device not ready");
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return -ENODEV;
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}
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return 0;
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}
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static DEVICE_API(gpio, gpio_sc18is606_driver_api) = {
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.pin_configure = gpio_sc18is606_pin_configure,
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.port_get_raw = gpio_sc18is606_port_get_raw,
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.port_set_masked_raw = gpio_sc18is606_port_set_masked_raw,
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.port_set_bits_raw = gpio_sc18is606_port_set_bits_raw,
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.port_clear_bits_raw = gpio_sc18is606_port_clear_bits_raw,
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.port_toggle_bits = gpio_sc18is606_port_toggle_bits,
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};
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#define CHECK_COMPAT(node) \
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COND_CODE_1(DT_NODE_HAS_COMPAT(node, nxp_sc18is606_spi), (DEVICE_DT_GET(node)), ())
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#define GPIO_SC18IS606_SPI_SIBLING(n) \ DT_FOREACH_CHILD_STATUS_OKAY(DT_INST_PARENT(n), CHECK_COMPAT)
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#define GPIO_SC18IS606_DEFINE(inst) \ static const struct gpio_sc18is606_config gpio_sc18is606_config##inst = { \
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.common = { \
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.port_pin_mask = GPIO_PORT_PIN_MASK_FROM_DT_INST(inst), \
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}, \
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.bridge = GPIO_SC18IS606_SPI_SIBLING(inst), \
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}; \
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static struct gpio_sc18is606_data gpio_sc18is606_data##inst = { \
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.conf = 0x00, \
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}; \
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\
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DEVICE_DT_INST_DEFINE(inst, gpio_sc18is606_init, NULL, \
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&gpio_sc18is606_data##inst, &gpio_sc18is606_config_##inst, \
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POST_KERNEL, CONFIG_GPIO_SC18IS606_INIT_PRIORITY, \
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&gpio_sc18is606_driver_api);
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DT_INST_FOREACH_STATUS_OKAY(GPIO_SC18IS606_DEFINE);
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‎dts/bindings/gpio/nxp,sc18is606-gpio.yaml‎

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# Copyright (c), 2025 tinyvision.ai
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# SPDX-License-Identifier: Apache-2.0
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description: GPIO Controller part for the SC18IS606 bridge
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compatible: "nxp,sc18is606-gpio"
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include: gpio-controller.yaml
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properties:
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"#gpio-cells":
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required: true
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const: 2
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ngpios:
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required: true
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const: 3
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gpio-cells:
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- pin
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- flags
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on-bus: nxp,sc18is606

‎dts/bindings/mfd/nxp,sc18is606.yaml‎

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#address-cells = <1>;
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#size-cells = <0>;
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};
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gpio_ext: sc18is606_gpio {
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compatible = "nxp,sc18is606-gpio";
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status = "okay";
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <3>;
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};
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};
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};
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