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992f8d9
sliced the bypass requests
Sep 18, 2024
8e3bd56
xilinx synthesis debugging fixes
tinebp Sep 18, 2024
f0bff2a
minor update
tinebp Sep 18, 2024
48f86a4
changed mem_req_arb in VX_cache_l3.sv to accept data_out
Sep 19, 2024
a37309c
xrtsim implementation
tinebp Sep 19, 2024
2d7f9ea
minor update
tinebp Sep 19, 2024
4fff940
two different versions of bypass connection
Sep 19, 2024
380c36d
merged rtlsim branch
Sep 19, 2024
e8ce387
Merge branch 'master' of github.com:vortexgpgpu/vortex
Sep 19, 2024
d2db612
adding scope support to xrtsim
tinebp Sep 20, 2024
63cce35
scope taps annotation
tinebp Sep 20, 2024
acc8221
Merge remote-tracking branch 'origin/master' into develop-documentation
Udit8348 Sep 20, 2024
ff9d52c
Merge remote-tracking branch 'upstream/master' into develop-documenta…
Udit8348 Sep 20, 2024
a61f97f
minor update
tinebp Sep 20, 2024
3bac7ea
changed fpnew commit
Sep 20, 2024
7938c7b
synthesis updates
tinebp Sep 21, 2024
00feb8b
scope analyzer bug fixes
tinebp Sep 21, 2024
b8199de
opaesim and xrtsim multi-bank memory support
tinebp Sep 22, 2024
54f0c8e
scope analyzer optimization
tinebp Sep 23, 2024
5e123d0
minor update
tinebp Sep 23, 2024
f5eca75
handling synthesis builds with simulation enabled (e.g xrt with hw_emu)
tinebp Sep 23, 2024
15ead4a
xrt with merge memory interface
tinebp Sep 23, 2024
b146fab
xrt kernel registers update
tinebp Sep 23, 2024
8bb5e5a
build error fix
tinebp Sep 23, 2024
e38c2c1
xilinx xrt platforms configuration
tinebp Sep 23, 2024
923d2bb
mark as executable
tinebp Sep 23, 2024
a80be89
fixed compiler errors
tinebp Sep 23, 2024
828b882
build error fix
tinebp Sep 23, 2024
29ea304
build fix
tinebp Sep 23, 2024
406583c
build fix
tinebp Sep 23, 2024
e5e9a5c
build fix
tinebp Sep 23, 2024
0300715
test memory bank interleaving
tinebp Sep 23, 2024
818522f
CI scripts update
tinebp Sep 23, 2024
9a6dbdf
xrtsim addressing fix
tinebp Sep 23, 2024
2cf483d
xrt afu bug fixes
tinebp Sep 24, 2024
b5f541b
Merge pull request #180 from vortexgpgpu/vortex_vm
hyesoon Sep 24, 2024
a9a5ded
bitmanip logceil fix
tinebp Sep 24, 2024
ce4f90e
scope analyzer updates
tinebp Sep 24, 2024
0e32067
scope_tap bug fix
tinebp Sep 25, 2024
4f11278
scope_tap bug fixes and improvements
tinebp Sep 25, 2024
27543e2
minor update
tinebp Sep 26, 2024
9a3eb74
adding scope.py support for structs
tinebp Sep 26, 2024
5db1937
fixed scope parser array indexing
tinebp Sep 27, 2024
e9f19a0
fixed BRAM multi-dimensional array bug on Xilinx Vivado
tinebp Sep 27, 2024
533ddff
cleanup multi-dimensional array to improve synthesis compatibility
tinebp Sep 27, 2024
f2c9708
minor update
tinebp Sep 27, 2024
6e40162
extending scope triggering to capture continous firing events
tinebp Sep 27, 2024
ec8cc4c
minor update
tinebp Sep 27, 2024
989341a
minor udpate
tinebp Sep 27, 2024
9027555
minor update
tinebp Sep 28, 2024
eee037f
minor update
tinebp Sep 28, 2024
87e613d
fixed XRT AFU deadlock on exit
tinebp Sep 28, 2024
b634f9f
count_leading_zeros fix
tinebp Sep 29, 2024
4329e3f
minor update
tinebp Sep 29, 2024
b8475c6
adjusting platform caps
tinebp Sep 29, 2024
30571d7
updated scope CI test
tinebp Sep 29, 2024
5c694a9
update scope tap testing
tinebp Sep 29, 2024
cf3909a
minor update
tinebp Sep 29, 2024
60860ec
minor update
tinebp Sep 29, 2024
a303192
minor update
tinebp Sep 29, 2024
2d00cec
minor update
tinebp Sep 30, 2024
1deb13c
minor update
tinebp Sep 30, 2024
6f81df5
axi_adapter large tags support
tinebp Sep 30, 2024
ee69024
minor update
tinebp Sep 30, 2024
4a60606
Merge branch 'develop' into tensor-core
jaewon-lee-github Sep 30, 2024
a3aca50
minor update
tinebp Sep 30, 2024
44ebc12
minor update
tinebp Oct 1, 2024
5cb033a
minor update
tinebp Oct 2, 2024
ad7377c
minor udpate
tinebp Oct 2, 2024
4b8ca42
minor update
tinebp Oct 2, 2024
83badaa
minor update
tinebp Oct 2, 2024
d1175a0
update the code accessing registers in obsoleted way
jaewon-lee-github Oct 2, 2024
6c72597
Merge pull request #184 from vortexgpgpu/develop
jaewon-lee-github Oct 2, 2024
b7531c9
support 64bit
jaewon-lee-github Oct 2, 2024
bbc02cc
merged with master
jaewon-lee-github Oct 3, 2024
5cf6797
- Change STARTUP_ADDR to use the same 0x80000000 address
jaewon-lee-github Oct 3, 2024
dd16d70
contributing and fpga docs
Udit8348 Oct 3, 2024
6a44735
remove redundant docs after consolidating
Udit8348 Oct 3, 2024
32b0376
remove old artifacts
Udit8348 Oct 3, 2024
208c5b3
reorg docs
Udit8348 Oct 4, 2024
bc765d1
Merge pull request #181 from sij814/master
tinebp Oct 4, 2024
119805a
Merge branch 'master' into tensor-core
jaewon-lee-github Oct 4, 2024
0bf79a0
Revert "Initial HBM changes for RTL"
jaewon-lee-github Oct 4, 2024
847562b
Merge pull request #187 from vortexgpgpu/revert-181-master
hyesoon Oct 4, 2024
faa3b9a
Merge branch 'master' into tensor-core
jaewon-lee-github Oct 4, 2024
91c135a
Merge pull request #185 from vortexgpgpu/tensor-core
hyesoon Oct 5, 2024
2eeb2ac
fixed memory flags propagation through the cache hierarchy
tinebp Oct 5, 2024
07ce16e
minor update
tinebp Oct 6, 2024
c91f968
minor update
tinebp Oct 6, 2024
ee96d43
VX_onehot_encoder update
tinebp Oct 9, 2024
f49084b
improving block rams inference with registered read address.
tinebp Oct 9, 2024
a5381fd
async bram optimization
tinebp Oct 9, 2024
d3df61a
add initial development and production dockerfiles
Udit8348 Oct 9, 2024
8155173
add documentation based on intial feedback
Udit8348 Oct 11, 2024
28bf27e
rtl cache redesign to support xilinx bram types
tinebp Oct 13, 2024
684f2e2
minor update
tinebp Oct 13, 2024
9f32e56
minor update
tinebp Oct 13, 2024
37f4d05
minor update
tinebp Oct 13, 2024
1d62658
minor update
tinebp Oct 13, 2024
9e5638c
minor update
tinebp Oct 13, 2024
f632333
minor update
tinebp Oct 13, 2024
26df675
minor update
tinebp Oct 14, 2024
2a2fc2a
minor update
tinebp Oct 14, 2024
fe5442d
minor update
tinebp Oct 14, 2024
0d04423
Readded the ecall and ebreak instruction traps so that the riscv-vect…
MichaelJSr Oct 14, 2024
37757fa
fixed fifo_queue support for BRAM
tinebp Oct 14, 2024
5d7e53f
Merge pull request #194 from MichaelJSr/add-back-ecall-ebreak-traps
tinebp Oct 15, 2024
03a1e25
adding cache replacement policy
tinebp Oct 15, 2024
db98965
minor update
tinebp Oct 15, 2024
68b78fc
minor update
tinebp Oct 15, 2024
1d5e4f6
minor update
tinebp Oct 15, 2024
e62b638
minor update
tinebp Oct 15, 2024
645befd
minor update
tinebp Oct 15, 2024
e06333b
minor update
tinebp Oct 15, 2024
f695e4d
minor update
tinebp Oct 15, 2024
a7ba377
minor update
tinebp Oct 17, 2024
5971158
minor update
tinebp Oct 17, 2024
077b682
minor update
tinebp Oct 17, 2024
91fee5d
minor update
tinebp Oct 17, 2024
6b1091e
minor update
tinebp Oct 17, 2024
8f29ad5
block ram redesign to support synthesizable write-first mode
tinebp Oct 19, 2024
b6bd646
cache hit timing optimization
tinebp Oct 20, 2024
4206ffd
minor update
tinebp Oct 20, 2024
2bd2225
minor update
tinebp Oct 20, 2024
9373e21
minor update
tinebp Oct 20, 2024
0f380a3
minor update
tinebp Oct 20, 2024
acc1e3d
minor update
tinebp Oct 21, 2024
22c3828
minor update
tinebp Oct 21, 2024
1e4f0fa
minor update
tinebp Oct 21, 2024
fccbadf
minor update
tinebp Oct 21, 2024
2b3d1f0
minor update
tinebp Oct 21, 2024
d584e7b
intermediate docs update
Udit8348 Oct 21, 2024
f184b57
merge upstream and resolve deleted file conflict
Udit8348 Oct 21, 2024
8fdca0e
correct vitis env
Udit8348 Oct 21, 2024
519023f
add citation for MICRO 21 paper
Udit8348 Oct 21, 2024
ff50306
minor update
tinebp Oct 22, 2024
3a3bb7b
cleanup deleted files
tinebp Oct 22, 2024
1fa4603
disable sformatf during synthesis
tinebp Oct 23, 2024
24d018b
documentation updates
Udit8348 Oct 23, 2024
1c384c0
minor update
tinebp Oct 23, 2024
7ab5811
minor update
tinebp Oct 23, 2024
e7d09fe
decode => demux
tinebp Oct 23, 2024
ec12b50
minor udpate
tinebp Oct 23, 2024
cc5ac83
minor update
tinebp Oct 23, 2024
2d3f4b6
Merge branch 'master' into develop-docker
hyesoon Oct 23, 2024
22ade31
minor updates
tinebp Oct 23, 2024
659ad87
Merge pull request #188 from Udit8348/develop-docker
hyesoon Oct 23, 2024
f68cc95
Merge branch 'master' into develop-documentation
hyesoon Oct 23, 2024
8b172d0
revert xilinx's asynchronous bram workaround
tinebp Oct 24, 2024
98b5860
merge fixes
tinebp Oct 24, 2024
eecff10
minor update
tinebp Oct 24, 2024
ce510d7
minor update
tinebp Oct 24, 2024
d475e9d
remove duplicate block
Udit8348 Oct 25, 2024
27f3d6d
Merge remote-tracking branch 'origin/master' into develop-documentation
Udit8348 Oct 25, 2024
e73e1c2
update xilinx fpga steps with environment variable steps
Udit8348 Nov 1, 2024
667fa16
update docker for micro apptainer
Udit8348 Nov 1, 2024
6dbbc62
Merge pull request #200 from Udit8348/develop-docker-micro
hyesoon Nov 9, 2024
bffc6d9
enabling Vivado's asynchronous bram suppot via direct netlist transfo…
tinebp Nov 14, 2024
dfc7b61
cleanup old cache test
tinebp Nov 14, 2024
5844de8
Merge branch 'rtl_cache'
tinebp Nov 14, 2024
8230b37
fixed opae build bug
tinebp Nov 14, 2024
b48b605
remove deprecared yosys link
tinebp Nov 15, 2024
320c090
xilinx asynchronous bram patch fixes
tinebp Nov 19, 2024
b0c48e7
stream buffer area optimization
tinebp Nov 21, 2024
8d8769c
stream_buffer area optimization
tinebp Nov 21, 2024
180735c
fifoqueue area optimization
tinebp Nov 22, 2024
18bf49d
minor update
tinebp Nov 22, 2024
7c4ce74
memory unit timing optimization
tinebp Nov 22, 2024
3e4bbfc
minor update
tinebp Nov 22, 2024
1e4583a
Adds the riscv vector extension into simx
MichaelJSr Nov 27, 2024
c05a057
Added vector regression test to ci.yml
MichaelJSr Nov 27, 2024
073e0dd
Adds the riscv vector extension into simx
MichaelJSr Nov 27, 2024
5eecd0e
Added case for vector-test due to different exitcode
MichaelJSr Nov 28, 2024
973fcd7
Merge branch 'riscv-vector-isa-simx-clean' of https://github.com/Mich…
MichaelJSr Nov 28, 2024
6c2cbdf
made -v a valid option for simx simulator
MichaelJSr Nov 28, 2024
951746b
Commented out some vector testcases that dont pass
MichaelJSr Nov 28, 2024
3b454ef
fixes to SimX's multiports memory support
tinebp Dec 3, 2024
24ca4f0
minor update
tinebp Dec 3, 2024
30b0daf
SimX multiports support fixes
tinebp Dec 3, 2024
3ace9bb
minor updates
tinebp Dec 4, 2024
86f20b2
SimX multi-ports memory fixes
tinebp Dec 5, 2024
a760d90
minor update
tinebp Dec 5, 2024
18ae57c
Merge branch 'bug_fixes'
tinebp Dec 5, 2024
5891a1e
Merge branch 'master' into riscv-vector-isa-simx-clean
tinebp Dec 5, 2024
5d91fe5
Merge pull request #211 from MichaelJSr/riscv-vector-isa-simx-clean
tinebp Dec 5, 2024
6b23d29
vector ISA updates
tinebp Dec 5, 2024
6bbcd4e
vector updates with clang formatting
tinebp Dec 5, 2024
896c593
adding clang-format file
tinebp Dec 5, 2024
115ff2b
minor fixes
tinebp Dec 6, 2024
aa6a47e
minor update
tinebp Dec 6, 2024
70ade22
multiport
tinebp Dec 11, 2024
f635d71
minor fix
tinebp Dec 11, 2024
7975a5a
fixed AXI adapter
tinebp Dec 13, 2024
461f2cb
Intel Opae AFU support for multiport
tinebp Dec 14, 2024
bae24e5
minor update
tinebp Dec 14, 2024
cad129c
added icache dcache overlap
Dec 15, 2024
572a397
changed versions
Dec 15, 2024
a98d2e2
rtlsim multibanks
tinebp Dec 17, 2024
066ab10
multiports fixes
tinebp Dec 18, 2024
4819891
minor update
tinebp Dec 18, 2024
100e4e3
multi-ports fixes
tinebp Dec 18, 2024
01974e1
Merge pull request #216 from sij814/simx2
tinebp Dec 18, 2024
f478bdc
memory coalescer misses perf counter
tinebp Dec 26, 2024
704f525
memory mem_coalescer miss perf counter
tinebp Dec 26, 2024
53900be
bug fixes
tinebp Dec 26, 2024
8fda922
minor update
tinebp Dec 26, 2024
adf60e7
minor update
tinebp Dec 26, 2024
43d33b9
minor update
tinebp Dec 26, 2024
84b1c8a
BRAM optimizations
tinebp Jan 11, 2025
083cf04
timing optimizations
tinebp Jan 11, 2025
347889c
minor updates
tinebp Jan 11, 2025
83ba1cc
minor update
tinebp Jan 12, 2025
929ef1b
Remove unused EXTV code, clean up code, pragma once around vpu.h
MichaelJSr Jan 14, 2025
87297e0
bug fixes
tinebp Jan 14, 2025
43b143b
bug fixes
tinebp Jan 14, 2025
cb491dd
test
MichaelJSr Jan 14, 2025
a2cfeff
Added ifndef statements for the vector extension anywhere they didn't…
MichaelJSr Jan 14, 2025
6d27575
Revert some of "Added ifndef statements for the vector extension anyw…
MichaelJSr Jan 15, 2025
fce24b9
fixed XRT AFU done handshake
tinebp Jan 18, 2025
001a107
bram reset bug fix
tinebp Jan 21, 2025
d1f37fc
minor update
tinebp Jan 21, 2025
fb4527f
cache repl reset
tinebp Jan 21, 2025
2c940cf
AXI adapter bug fix
tinebp Jan 21, 2025
4e83c28
minor bug fix
tinebp Jan 22, 2025
0c1bc17
Merge pull request #222 from MichaelJSr/simx-vpu-toggle
tinebp Jan 22, 2025
9dc1d3f
Merge branch 'bug_fixes'
tinebp Jan 22, 2025
e80ee2c
minor update
tinebp Jan 22, 2025
22398c9
ramulator memory addressing bug fix + platform memory refactoring
tinebp Jan 26, 2025
82b0eed
minor update
tinebp Jan 27, 2025
38861d9
minor updates
tinebp Jan 27, 2025
4785736
minor update
tinebp Jan 27, 2025
9a2709d
xrt sandbox synthesis build fix
tinebp Feb 11, 2025
a9352a3
minor update
tinebp Feb 12, 2025
cc7fdf2
fixed github actions versioning
tinebp Feb 12, 2025
63b41f2
xrt sandbox simulation
tinebp Feb 12, 2025
b35f69f
CI versioning
tinebp Mar 13, 2025
09e8979
Merge pull request #237 from vortexgpgpu/bug_fixes
tinebp Mar 13, 2025
06e5e2e
workaroud fix for opencl kernel include in POCL
tinebp Mar 17, 2025
9929c42
Merge pull request #238 from vortexgpgpu/bug_fixes
tinebp Mar 17, 2025
a35fb4b
regression fix
tinebp Mar 17, 2025
18687d5
Merge branch 'master' into bug_fixes
tinebp Mar 17, 2025
6a7e402
Merge pull request #239 from vortexgpgpu/bug_fixes
tinebp Mar 17, 2025
f193350
CI migration to ubuntu 22.04
tinebp Apr 13, 2025
5dbfcec
minor update
tinebp Apr 14, 2025
332e8ee
Merge pull request #244 from vortexgpgpu/bug_fixes
tinebp Apr 14, 2025
83aacfb
Add VM performance modeling with TLB integration
anuragyadav1999 Oct 10, 2025
c5dcfeb
Add simplified Page Table Walker (PTW) for realistic VM performance m…
anuragyadav1999 Oct 10, 2025
2a5c071
Integrate physical address tracking and improve VM performance modeling
anuragyadav1999 Oct 16, 2025
d9412e9
Fix PTW implementation and improve TLB/PTW functionality
anuragyadav1999 Nov 21, 2025
4f9a26a
Merge pull request #2 from Tachyon01/vm_simx
Tachyon01 Nov 30, 2025
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8 changes: 8 additions & 0 deletions .clang-format
Original file line number Diff line number Diff line change
@@ -0,0 +1,8 @@
Language: Cpp
BasedOnStyle: LLVM
IndentWidth: 2
TabWidth: 2
ColumnLimit: 0
UseTab: Never
BreakBeforeBraces: Attach
AlwaysBreakTemplateDeclarations: true
22 changes: 11 additions & 11 deletions .github/workflows/ci.yml
Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ on: [push, pull_request]

jobs:
setup:
runs-on: ubuntu-20.04
runs-on: ubuntu-22.04

steps:
- name: Checkout code
Expand Down Expand Up @@ -46,7 +46,7 @@ jobs:
- name: Install Dependencies
if: steps.cache-toolchain.outputs.cache-hit != 'true' || steps.cache-thirdparty.outputs.cache-hit != 'true'
run: |
sudo bash ./ci/system_updates.sh
sudo bash ./ci/install_dependencies.sh

- name: Setup Toolchain
if: steps.cache-toolchain.outputs.cache-hit != 'true'
Expand All @@ -63,7 +63,7 @@ jobs:
make -C third_party > /dev/null

build:
runs-on: ubuntu-20.04
runs-on: ubuntu-22.04
needs: setup
strategy:
matrix:
Expand All @@ -75,7 +75,7 @@ jobs:

- name: Install Dependencies
run: |
sudo bash ./ci/system_updates.sh
sudo bash ./ci/install_dependencies.sh

- name: Cache Toolchain Directory
id: cache-toolchain
Expand Down Expand Up @@ -111,13 +111,13 @@ jobs:
name: build-${{ matrix.xlen }}
path: build${{ matrix.xlen }}

test:
runs-on: ubuntu-20.04
tests:
runs-on: ubuntu-22.04
needs: build
strategy:
fail-fast: false
matrix:
name: [regression, opencl, cache, config1, config2, debug, stress, vm]
name: [regression, opencl, cache, config1, config2, debug, scope, stress, synthesis, vm, vector]
xlen: [32, 64]

steps:
Expand All @@ -126,7 +126,7 @@ jobs:

- name: Install Dependencies
run: |
sudo bash ./ci/system_updates.sh
sudo bash ./ci/install_dependencies.sh

- name: Cache Toolchain Directory
id: cache-toolchain
Expand All @@ -151,6 +151,7 @@ jobs:
with:
name: build-${{ matrix.xlen }}
path: build${{ matrix.xlen }}

- name: Run tests
run: |
cd build${{ matrix.xlen }}
Expand All @@ -160,15 +161,14 @@ jobs:
./ci/regression.sh --unittest
./ci/regression.sh --isa
./ci/regression.sh --kernel
./ci/regression.sh --synthesis
./ci/regression.sh --regression
else
./ci/regression.sh --${{ matrix.name }}
fi

complete:
runs-on: ubuntu-20.04
needs: test
runs-on: ubuntu-22.04
needs: tests

steps:
- name: Check Completion
Expand Down
6 changes: 3 additions & 3 deletions .gitmodules
Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@
[submodule "third_party/fpnew"]
path = third_party/fpnew
url = https://github.com/pulp-platform/fpnew.git
[submodule "third_party/softfloat"]
path = third_party/softfloat
url = https://github.com/ucb-bar/berkeley-softfloat-3.git
[submodule "third_party/ramulator"]
path = third_party/ramulator
url = https://github.com/CMU-SAFARI/ramulator2.git
[submodule "third_party/cvfpu"]
path = third_party/cvfpu
url = https://github.com/openhwgroup/cvfpu.git
20 changes: 20 additions & 0 deletions Dockerfile.dev
Original file line number Diff line number Diff line change
@@ -0,0 +1,20 @@
FROM ubuntu:20.04

LABEL "Udit Subramanya"="[email protected]"

ENV DEBIAN_FRONTEND=noninteractive

RUN apt-get update && \
apt-get install -y build-essential valgrind git wget libpng-dev libboost-all-dev uuid-dev ccache cmake

# Third-Party Repository to Install g++11 on Ubuntu 18.04
RUN apt-get install -y manpages-dev software-properties-common
RUN add-apt-repository -y ppa:ubuntu-toolchain-r/test

RUN apt-get install -y gcc-11 g++-11

RUN update-alternatives --install /usr/bin/gcc gcc /usr/bin/gcc-11 11
RUN update-alternatives --install /usr/bin/g++ g++ /usr/bin/g++-11 11

# create a directory for mounting the volume
WORKDIR /root/vortex
60 changes: 42 additions & 18 deletions README.md
Original file line number Diff line number Diff line change
@@ -1,10 +1,35 @@
# Vortex GPGPU

Vortex is a full-stack open-source RISC-V GPGPU.
Vortex is a full-stack open-source RISC-V GPGPU. Vortex supports multiple **backend drivers**, including our C++ simulator (simx), an RTL simulator, and physical Xilinx and Altera FPGAs-- all controlled by a single driver script. The chosen driver determines the corresponding code invoked to run Vortex. Generally, developers will prototype their intended design in simx, before completing going forward with an RTL implementation. Alternatively, you can get up and running by selecting a driver of your choice and running a demo program.

## Website
Vortex news can be found on its [website](https://vortex.cc.gatech.edu/)

## Citation
```
@inproceedings{10.1145/3466752.3480128,
author = {Tine, Blaise and Yalamarthy, Krishna Praveen and Elsabbagh, Fares and Hyesoon, Kim},
title = {Vortex: Extending the RISC-V ISA for GPGPU and 3D-Graphics},
year = {2021},
isbn = {9781450385572},
publisher = {Association for Computing Machinery},
address = {New York, NY, USA},
url = {https://doi.org/10.1145/3466752.3480128},
doi = {10.1145/3466752.3480128},
abstract = {The importance of open-source hardware and software has been increasing. However, despite GPUs being one of the more popular accelerators across various applications, there is very little open-source GPU infrastructure in the public domain. We argue that one of the reasons for the lack of open-source infrastructure for GPUs is rooted in the complexity of their ISA and software stacks. In this work, we first propose an ISA extension to RISC-V that supports GPGPUs and graphics. The main goal of the ISA extension proposal is to minimize the ISA changes so that the corresponding changes to the open-source ecosystem are also minimal, which makes for a sustainable development ecosystem. To demonstrate the feasibility of the minimally extended RISC-V ISA, we implemented the complete software and hardware stacks of Vortex on FPGA. Vortex is a PCIe-based soft GPU that supports OpenCL and OpenGL. Vortex can be used in a variety of applications, including machine learning, graph analytics, and graphics rendering. Vortex can scale up to 32 cores on an Altera Stratix 10 FPGA, delivering a peak performance of 25.6 GFlops at 200 Mhz.},
booktitle = {MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture},
pages = {754–766},
numpages = {13},
keywords = {reconfigurable computing, memory systems., computer graphics},
location = {Virtual Event, Greece},
series = {MICRO '21}
}
```

## Specifications

- Support RISC-V RV32IMAF and RV64IMAFD

- Microarchitecture:
- configurable number of cores, warps, and threads.
- configurable number of ALU, FPU, LSU, and SFU units per core.
Expand All @@ -29,34 +54,33 @@ Vortex is a full-stack open-source RISC-V GPGPU.
- `ci`: Continuous integration scripts.
- `miscs`: Miscellaneous resources.

## Build Instructions
More detailed build instructions can be found [here](docs/install_vortex.md).
## Quick Start
If you are interested in a stable release of Vortex, you can download the latest release [here](https://github.com/vortexgpgpu/vortex/releases/latest). Otherwise, you can pull the most recent, but (potentially) unstable version as shown below. The following steps demonstrate how to build and run Vortex with the default driver: SimX. If you are interested in a different backend, look [here](docs/simulation.md).

### Supported OS Platforms
- Ubuntu 18.04, 20.04
- Ubuntu 18.04, 20.04, 22.04, 24.04
- Centos 7
### Toolchain Dependencies
The following dependencies will be fetched prebuilt by `toolchain_install.sh`.
- [POCL](http://portablecl.org/)
- [LLVM](https://llvm.org/)
- [RISCV-GNU-TOOLCHAIN](https://github.com/riscv-collab/riscv-gnu-toolchain)
- [Verilator](https://www.veripool.org/verilator)
- [FpNew](https://github.com/pulp-platform/fpnew.git)
- [cvfpu](https://github.com/openhwgroup/cvfpu.git)
- [SoftFloat](https://github.com/ucb-bar/berkeley-softfloat-3.git)
- [Ramulator](https://github.com/CMU-SAFARI/ramulator.git)
- [Yosys](https://github.com/YosysHQ/yosys)
- [Sv2v](https://github.com/zachjs/sv2v)
### Install development tools
```sh
sudo apt-get install build-essential
sudo apt-get install binutils
sudo apt-get install python
sudo apt-get install uuid-dev
sudo apt-get install git
```
### Install Vortex codebase
```sh
git clone --depth=1 --recursive https://github.com/vortexgpgpu/vortex.git
cd vortex
```
### Install system dependencies
```sh
# ensure dependent libraries are present
sudo ./ci/install_dependencies.sh
```
### Configure your build folder
```sh
mkdir build
Expand Down Expand Up @@ -91,20 +115,20 @@ make -s
make -s
make install
```
- Building Vortex 64-bit simply requires using --xlen=64 configure option.
- Building Vortex 64-bit requires setting --xlen=64 configure option.
```sh
../configure --xlen=32 --tooldir=$HOME/tools
../configure --xlen=64 --tooldir=$HOME/tools
```
- Sourcing "./ci/toolchain_env.sh" is required everytime you start a new terminal. we recommend adding "source <build-path>/ci/toolchain_env.sh" to your ~/.bashrc file to automate the process at login.
```sh
echo "source <build-path>/ci/toolchain_env.sh" >> ~/.bashrc
```
- Making changes to Makefiles in your source tree or adding new folders will require executing the "configure" script again to get it propagated into your build folder.
- Making changes to Makefiles in your source tree or adding new folders will require executing the "configure" script again without any options to get changes propagated to your build folder.
```sh
../configure
```
- To debug the GPU, you can generate a "run.log" trace. see /docs/debugging.md for more information.
- To debug the GPU, the simulation can generate a runtime trace for analysis. See /docs/debugging.md for more information.
```sh
./ci/blackbox.sh --app=demo --debug=3
```
- For additional information, check out the /docs.
- For additional information, check out the [documentation](docs/index.md)
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