Skip to content

Commit

Permalink
Fixed types in these test benches
Browse files Browse the repository at this point in the history
  • Loading branch information
@mschiller-nrao
mschiller-nrao committed May 25, 2023
1 parent 3f3bf20 commit b3bd772
Show file tree
Hide file tree
Showing 2 changed files with 21 additions and 21 deletions.
16 changes: 8 additions & 8 deletions casper_wb_fft/tb_vu_wb_fft_vfmodel.vhd
View file
Original file line number Diff line number Diff line change
Expand Up @@ -60,12 +60,12 @@ constant c_fft_test : t_fft := (
);
signal clk : std_logic;
signal rst : std_logic;
signal in_re : t_slv_array(c_fft_test.wb_factor - 1 downto 0)(c_fft_test.in_dat_w-1 downto 0);
signal in_im : t_slv_array(c_fft_test.wb_factor - 1 downto 0)(c_fft_test.in_dat_w-1 downto 0);
signal in_re : t_slv_44_arr(c_fft_test.wb_factor - 1 downto 0);
signal in_im : t_slv_44_arr(c_fft_test.wb_factor - 1 downto 0);
signal in_val : std_logic;
signal shiftreg : std_logic_vector(g_fftsize_log2-1 downto 0);
signal out_re : t_slv_array(c_fft_test.wb_factor - 1 downto 0)(c_fft_test.out_dat_w-1 downto 0);
signal out_im : t_slv_array(c_fft_test.wb_factor - 1 downto 0)(c_fft_test.out_dat_w-1 downto 0);
signal out_re : t_slv_64_arr(c_fft_test.wb_factor - 1 downto 0);
signal out_im : t_slv_64_arr(c_fft_test.wb_factor - 1 downto 0);
signal ovflw : std_logic_vector(g_fftsize_log2-1 downto 0);
signal out_val : std_logic;
signal endsim : std_logic := '0';
Expand Down Expand Up @@ -260,8 +260,8 @@ fft_r2_wide_inst : entity wb_fft_lib.fft_r2_wide
read(line_var,temp_number);
dataQ := to_signed(temp_number,g_in_dat_w);
in_val <= '1';
in_re(widx) <= std_logic_vector(dataI);
in_im(widx) <= std_logic_vector(dataQ);
in_re(widx) <= std_logic_vector(resize(dataI,44));
in_im(widx) <= std_logic_vector(resize(dataQ,44));
end loop;
wait until rising_edge(clk);
in_val <= '0';
Expand All @@ -275,8 +275,8 @@ fft_r2_wide_inst : entity wb_fft_lib.fft_r2_wide
for n in 1 to (3*(c_fftsize/c_fft_test.wb_factor)) loop
in_val <= '1';
for widx in 0 to (c_fft_test.wb_factor-1) loop
in_re(widx) <= std_logic_vector(to_signed(0,g_in_dat_w));
in_im(widx) <= std_logic_vector(to_signed(0,g_in_dat_w));
in_re(widx) <= std_logic_vector(to_signed(0,44));
in_im(widx) <= std_logic_vector(to_signed(0,44));
end loop;
wait until rising_edge(clk);
in_val <= '0';
Expand Down
26 changes: 13 additions & 13 deletions casper_wbpfb/wbpfb_unit.vhd
View file
Original file line number Diff line number Diff line change
Expand Up @@ -116,16 +116,16 @@ architecture str of wbpfb_unit is
signal fil_out_arr : t_fil_slv_arr_out(c_nof_complex * g_wpfb.nof_wb_streams * g_wpfb.wb_factor - 1 downto 0); -- output of the filterbank is the fft input
signal fil_out_val : std_logic;

signal fft_in_re_arr : t_slv_array(g_wpfb.nof_wb_streams * g_wpfb.wb_factor - 1 downto 0)(g_wpfb.fft_in_dat_w-1 downto 0);
signal fft_in_im_arr : t_slv_array(g_wpfb.nof_wb_streams * g_wpfb.wb_factor - 1 downto 0)(g_wpfb.fft_in_dat_w-1 downto 0);
signal fft_in_re_arr : t_slv_44_arr(g_wpfb.nof_wb_streams * g_wpfb.wb_factor - 1 downto 0);
signal fft_in_im_arr : t_slv_44_arr(g_wpfb.nof_wb_streams * g_wpfb.wb_factor - 1 downto 0);
signal fft_in_val : std_logic;

signal fft_in_sosi : t_fft_sosi_in;

signal fft_out_re_arr_i : t_slv_array(g_wpfb.nof_wb_streams * g_wpfb.wb_factor - 1 downto 0)(g_wpfb.fft_out_dat_w-1 downto 0);
signal fft_out_im_arr_i : t_slv_array(g_wpfb.nof_wb_streams * g_wpfb.wb_factor - 1 downto 0)(g_wpfb.fft_out_dat_w-1 downto 0);
signal fft_out_re_arr : t_slv_array(g_wpfb.nof_wb_streams * g_wpfb.wb_factor - 1 downto 0)(g_wpfb.fft_out_dat_w-1 downto 0);
signal fft_out_im_arr : t_slv_array(g_wpfb.nof_wb_streams * g_wpfb.wb_factor - 1 downto 0)(g_wpfb.fft_out_dat_w-1 downto 0);
type t_fft_out_type is array (g_wpfb.nof_wb_streams * g_wpfb.wb_factor - 1 downto 0) of std_logic_vector(g_wpfb.fft_out_dat_w-1 downto 0);
signal fft_out_re_arr_i : t_fft_out_type;
signal fft_out_im_arr_i : t_fft_out_type;
signal fft_out_re_arr : t_slv_64_arr(g_wpfb.nof_wb_streams * g_wpfb.wb_factor - 1 downto 0);
signal fft_out_im_arr : t_slv_64_arr(g_wpfb.nof_wb_streams * g_wpfb.wb_factor - 1 downto 0);
signal fft_out_val : std_logic_vector(g_wpfb.nof_wb_streams - 1 downto 0);

signal fft_out_sosi_arr : t_fft_sosi_arr_out(g_wpfb.nof_wb_streams * g_wpfb.wb_factor - 1 downto 0) := (others => c_fft_sosi_rst_out);
Expand Down Expand Up @@ -247,8 +247,8 @@ begin
-----------------------------------------------------------------------------------------------------
gen_prep_fft_streams : for I in 0 to g_wpfb.nof_wb_streams - 1 generate
gen_prep_fft_wb_factor : for J in 0 to g_wpfb.wb_factor - 1 generate
fft_in_re_arr(I * g_wpfb.wb_factor + J) <= fil_out_arr(J * c_nof_complex * g_wpfb.nof_wb_streams + I * c_nof_complex);
fft_in_im_arr(I * g_wpfb.wb_factor + J) <= fil_out_arr(J * c_nof_complex * g_wpfb.nof_wb_streams + I * c_nof_complex + 1);
fft_in_re_arr(I * g_wpfb.wb_factor + J) <= RESIZE_SVEC(fil_out_arr(J * c_nof_complex * g_wpfb.nof_wb_streams + I * c_nof_complex),44);
fft_in_im_arr(I * g_wpfb.wb_factor + J) <= RESIZE_SVEC(fil_out_arr(J * c_nof_complex * g_wpfb.nof_wb_streams + I * c_nof_complex + 1),44);
end generate;
end generate;
-----------------------------------------------------------------------------------------------------
Expand Down Expand Up @@ -287,8 +287,8 @@ begin
-- PREPARE INPUT DATA FOR WIDEBAND FFT
---------------------------------------------------------------
gen_prep_fft_streams : for I in 0 to g_wpfb.nof_wb_streams - 1 generate
fft_in_re_arr(I) <= fil_out_arr(I * c_nof_complex);
fft_in_im_arr(I) <= fil_out_arr(I * c_nof_complex + 1);
fft_in_re_arr(I) <= RESIZE_SVEC(fil_out_arr(I * c_nof_complex),44);
fft_in_im_arr(I) <= RESIZE_SVEC(fil_out_arr(I * c_nof_complex + 1),44);
end generate;

gen_prep_pipe_fft_streams : for I in 0 to g_wpfb.nof_wb_streams - 1 generate
Expand Down Expand Up @@ -316,8 +316,8 @@ begin
ovflw => ovflw,
out_val => fft_out_val(I)
);
fft_out_re_arr(I) <= fft_out_re_arr_i(I);
fft_out_im_arr(I) <= fft_out_im_arr_i(I);
fft_out_re_arr(I) <= RESIZE_SVEC(fft_out_re_arr_i(I),64);
fft_out_im_arr(I) <= RESIZE_SVEC(fft_out_im_arr_i(I),64);
end generate;
end generate;

Expand Down

0 comments on commit b3bd772

Please sign in to comment.