Refresh owned MLX dependency chain

[a-github-name]

Summary

• pin mlx-swift to 3e6df6d8163a8f212061d15739eeeec12d5b89e3 and embedded MLX to b57bd7640f3f7c743b76a58478faaf1e8ee084f2
• regenerate and vendor the provenance-locked Metal library
• document the owned patch inventory, upstream cutoffs, and repeatable bottom-up refresh procedure
• make the Qwen ASR E2E assertion tolerate semantically harmless punctuation
• carry the Ubuntu/Swift 6.0 CPU matmul compile fix discovered by downstream Linux CI
• fix CUDA library discovery and packaged runtime loading when toolkit libraries are split between generic and target-specific SBSA directories

Provenance

• MLX core version: 0.32.1
• mlx-swift revision: 3e6df6d8163a8f212061d15739eeeec12d5b89e3
• embedded MLX revision: b57bd7640f3f7c743b76a58478faaf1e8ee084f2
• generated-kernel SHA-256: fb0c62d372d6aaa75edfbcb950d9dd797fce944a7df7bcde24dce2a672024be5
• metallib SHA-256: 8dcf3b0ef8de0f9ae00fe11c92e7ba6b7a2f345fe7501bff7970b9efd2d7c1a3

Validation

• scripts/check.sh: full lint/build/test/help/hygiene/provenance gate passes (2,833 XCTest cases, 206 skipped, 0 failures; 30 Swift Testing tests also pass)
• MERERUN_RUN_E2E=core scripts/check.sh: 10 pass, 0 fail, 1 missing-model skip
• MERERUN_RUN_E2E=installed scripts/check.sh: 14 pass, 0 fail, 4 missing-model skips
• packed 1-bit Bonsai: exact requested response, 20.32 decode tok/s
• NVFP4 Laguna XS: exact requested response, 21.04 decode tok/s
• affine 8-bit LFM: successful 16-token decode, 81.40 decode tok/s
• LTX 2.3 true-inference video gate: pass, decoded artifact, 91.3s
• MiniMax-H3 100 GB BF16 synchronized AV gate: pass, decoded video/audio artifact, 22.4s

Linux CUDA / SBSA

Validated the exact PR checkout and dependency pins on Ubuntu 24.04 arm64 with an NVIDIA GB10 (compute capability 12.1), driver 580.159.03, CUDA 13.3, Swift 6.0.3, cuDNN, NCCL, and OpenBLAS:

• scripts/prepare-linux-native.sh built llama CUDA for 121a-real, resolved mlx-swift 3e6df6d... / MLX b57bd764..., and built all 246 MLX/Swift bridge targets.
• MLX Swift example1 --device gpu executed successfully and reported Using device: Device(gpu, 0).
• the full release mere.run CUDA package built successfully.
• the initial packaged run exposed a real SBSA loader gap: CUDA libraries were split across /usr/local/cuda-13.3/lib64 and /usr/local/cuda-13.3/targets/sbsa-linux/lib.
• commit 1762c55d fixes build-time and packaged-runtime discovery, adds fixture and Swift contract coverage, and passes scripts/test-package-linux.sh on the GB10 host.
• after rebuilding, the packaged wrapper succeeds with LD_LIBRARY_PATH, CUDA_HOME, and CUDA_PATH unset; ELF RUNPATH and ldd resolve CUDA, cuDNN, NCCL, NVRTC, cuFFT, and OpenBLAS, and a mere.run text chat launch reports [runtime] text backend: native MLX (default device: gpu) before reaching the intentionally absent test model.

GitHub Actions covers Linux CPU; the actual GPU bridge, linker, package, launcher, and backend selection were exercised manually because the fork has no configured GPU runner.

Dependencies

• Refresh MLX fork onto current upstream cutoff mlx#3
• Refresh mlx-swift fork and embedded MLX mlx-swift#6

Dependency performance A/B

Measured on an Apple M4 Max / 128 GB / macOS 26.5.2 with release binaries built from identical mere.run sources. Baseline pins the production mlx.fast-derived mlx-swift revision 22c76cc40edbae2c2af72532678d8e5c06cbfa46; candidate pins 3e6df6d8163a8f212061d15739eeeec12d5b89e3. No thermal or performance warning was recorded.

• Laguna XS 2.1, plain target path with DFlash unavailable, deterministic long prompt and 128 greedy tokens, one warmup per binary plus four alternating samples: median decode 107.76 -> 107.75 tok/s (-0.005%); median prefill 0.750 -> 0.750 s; median TTFT 1.162 -> 1.165 s (+0.26%); median first-token latency 0.013 -> 0.013 s; median E2E 54.60 -> 54.54 tok/s (-0.11%). The 720-byte generated response is byte-identical (e72a7103735f7ee2fe069b188a8fc36da0493821516c10587716dea00d1874ce).
• MiniMax-H3 resident BF16 synchronized A/V, 22 frames at 64x64, one 50-block evaluation, fixed seed, three runs per pin: median wall 17.45 -> 17.51 s (+0.34%); median native generation 17.183 -> 17.279 s (+0.56%); steady transformer evaluation 0.828 -> 0.827 s; median transformer preparation 10.698 -> 10.777 s (+0.74%). Active/peak Metal memory is unchanged at 37.41/38.97 GiB. Both artifacts are valid H.264/AAC; cross-pin video PSNR is 55.81 dB, SSIM 0.99837, and audio PSNR is 163.5 dB.
• acceptance floor was 95% of baseline for decode and prefill. Both lanes remain effectively flat and comfortably pass.
• fresh-user-cache Laguna control (two isolated CFFIXED_USER_HOME runs per pin): median decode 110.12 -> 110.09 tok/s (-0.02%); prefill 0.695 -> 0.700 s (+0.72%); TTFT 1.083 -> 1.091 s (+0.78%); total 2.24 -> 2.25 s (+0.45%). The earlier single candidate PSO-cache outlier did not reproduce.

The refreshed core still contains the H3 M4 GEMM selector, Laguna causal Steel bound, and NAX A-tile hoist/load-rows optimization; regenerated Swift sources and the AOT metallib contain the matching runtime code.