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core_arch: Fix ARMv6 CP15 barrier #1470

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merged 2 commits into from
Sep 29, 2023

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@taiki-e taiki-e commented Sep 26, 2023

ARM11 MPCore Processor Technical Reference Manual says the value in the Rd register of these instructions is SBZ (should be zero).

MCR p15, 0, <Rd>, c7, <CRm>, <Opcode_2>

Data

This is the value that is written to CP15 c7. This is the value in the Rd register specified in the MCR instruction.

a1 a2 a3

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rustbot commented Sep 26, 2023

r? @Amanieu

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@Amanieu Amanieu merged commit ca1b140 into rust-lang:master Sep 29, 2023
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@taiki-e taiki-e deleted the core-arch-cp15-barrier branch September 29, 2023 08:11
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3 participants