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[executorch][cuda] Add a length-aware Triton SDPA over per-sequence KV columns - #24879
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…V columns Pull Request resolved: #24072 Adds `triton::sdpa_varlen`, the attention kernel the CUDA batched-sequence KV cache needs. Each resident sequence owns one column of a `[rows, cols, H, D]` store, and a device segment table `seq_info Int32[S, 4] = (q_start, q_len, col, kv_end)` says which packed query rows belong to which column and how long that sequence is. Lengths are read on device, so one captured CUDA graph serves any mix of sequence lengths, as the MLX per-sequence SDPA does per group. Covers causal, non-causal (DFlash draft blocks), sliding window and ring storage, GQA, rows no segment covers (zeroed), and split-K for short steps. A symbolic query length takes the generic path without host-side length branches, so exporting it with a dynamic step width does not pin that width. It is a new op in its own file; `triton::sdpa` and its dispatch are untouched. ghstack-source-id: 469359730 @exported-using-ghexport Differential Revision: [D125987296](https://our.internmc.facebook.com/intern/diff/D125987296/)
🔗 Helpful Links🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/24879
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ghstack PR number: #24072 by @Gasoonjia
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ghstack PR base: https://github.com/pytorch/executorch/tree/gh/Gasoonjia/90/base
ghstack PR head: https://github.com/pytorch/executorch/tree/gh/Gasoonjia/90/head
Merge bot PR base: https://github.com/pytorch/executorch/tree/main
Merge bot PR head: https://github.com/pytorch/executorch/tree/gh/Gasoonjia/90/orig
Differential Revision: D125987296
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