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feat(qwen35): add SM120 FlashInfer GDN prefill candidate - #862

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feat(qwen35): add SM120 FlashInfer GDN prefill candidate#862
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qwzx-qwas:feat/qwen35-flashinfer-gdn-sm120-pr

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Summary

This PR adds an SM120 FlashInfer GDN prefill candidate for Qwen3.5, including:

  • native CUDA preparation kernels and Rust FFI;
  • a validated FlashInfer PTX artifact generation and loading pipeline;
  • pinned source/toolchain contracts and an HKV state-layout patch;
  • explicit FlashInfer operator, HF golden, chunked-prefill, scheduler/CUDA Graph, and benchmark entry points;
  • an ABBA benchmark harness for comparison with the existing Triton backend.

The production prefill_chunk_forward() path remains hard-coded to Triton. This PR does not switch serving traffic to FlashInfer and does not introduce an automatic fallback policy. The two backends share the surrounding embedding, full-attention, MLP, residual, and layer-loop logic; they diverge in backend-owned scratch allocation and the linear-attention prefill operation.

Correctness

Validated on RTX 5090 / SM120 with driver 580.126.09 and CUDA 12.8.

The production Qwen3.5-4B geometry, Hq/Hk/Hv/D = 16/16/32/128, passes:

  • operator tests for T = 1, 2, 63, 64, 65, 127, and 128;
  • short and long HF golden gates;
  • chunked versus unchunked prefill;
  • scheduler and CUDA Graph integration tests.

The non-production Hv48 generalization diagnostic passes output checks but has 5/786432 localized final-state tail violations at T=128 relative to the FP64 oracle. Triton has 2 violations for this case. FlashInfer nevertheless has better overall max_abs, mean_abs, and p99_abs state error at T=128.

Patched HKV and unmodified upstream HVK artifacts produce bitwise-identical outputs and states after layout conversion, including the same five violation coordinates. The Hv48 tail therefore originates in the upstream FlashInfer SM120 numerical path rather than the OpenInfer layout patch, TMA indexing, or alias handling.

Performance

Same-machine non-profiled ABBA results:

  • T=128, concurrency=8: FlashInfer 378.75 tok/s vs Triton 360.72 tok/s, approximately +5.0%.
  • T=2048, concurrency=1: FlashInfer 54.15 tok/s vs Triton 52.82 tok/s, approximately +2.52%.
  • T=2048 backend-owned scratch: FlashInfer 50,877,716 bytes including runtime workspace vs Triton 193,462,272 bytes, approximately 73.7% lower.
  • FlashInfer runtime workspace: 21,760 bytes.

The non-profiled ABBA results are used for end-to-end latency and throughput. Nsight runs are retained as diagnostic kernel evidence rather than mixed into the latency comparison.

Artifact

Validated artifact SHA-256:

225646b26dab488cdfd64dcf3fe189ba4b7ccaf2ba735eb7b68a47d13db96b68

The repository contains the generator, pinned source/toolchain metadata, validation contract, and local-generation documentation. Generated PTX, manifests, bundles, model weights, build outputs, logs, and Nsight reports are not included in this PR.

The frozen HKV patch currently contains one trailing-whitespace line. Changing it alters the pinned source-set hash and requires artifact regeneration and GPU revalidation.

Maintainer decisions requested

This PR intentionally leaves the following policy decisions open:

  1. whether SM120 production serving should switch to FlashInfer;
  2. whether Triton should remain as an internal rollback path;
  3. whether artifacts should be prebuilt, locally generated, or support both;
  4. whether the Hv48 upstream numerical tail should become a permanent diagnostic gate;
  5. whether the candidate is ready for release integration.

Refs #691

@qwzx-qwas
qwzx-qwas marked this pull request as ready for review August 10, 2026 14:04

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Reviewed commit: 8c88c6c9c4

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Comment on lines +51 to +52
git rev-parse HEAD
git status --short -- pegainfer-qwen35

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P1 Badge Validate the benchmark's actual source tree

When Stage 9 is run from a working checkout, this records the current commit but neither compares it with PEGAINFER_STAGE9_COMMIT nor checks changes outside pegainfer-qwen35. In particular, edits under pegainfer-kernels—which contains the candidate CUDA kernel and FFI—are compiled while remaining invisible in the provenance log, so results can be attributed to a clean commit that did not produce them. Validate the supplied commit against git rev-parse HEAD and reject or capture the complete dirty tree before benchmarking.

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Comment on lines +513 to +514
_require_equal(artifact.get("size_bytes"), len(data), "artifact size")
_require_equal(artifact.get("sha256"), sha256_bytes(data), "artifact hash")

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P2 Badge Pin the standalone validator to the candidate PTX

When a generated, downloaded, or copied bundle is checked without --flashinfer-dir as documented, this only verifies that the manifest's hash matches its accompanying bytes. A modified PTX can therefore be accepted after recomputing the artifact and bundle hashes; even source-assisted validation does not bind those instructions to the pinned source. The Rust loader later rejects such a bundle using its hard-coded candidate hash, making the advertised validation produce a false success. Check the pinned release PTX hash here as well.

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Run source and host-side contract checks without CuTe:

```bash
python3 pegainfer-kernels/tools/flashinfer_gdn/artifact_contract.py verify-source

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P2 Badge Initialize the pinned submodule before verification

On a fresh checkout whose FlashInfer submodule has not been initialized, this documented first command fails: git -C pegainfer-kernels/third_party/flashinfer rev-parse HEAD walks up to the parent repository and reports its unrelated commit as a FlashInfer SHA mismatch. Initialize/update the pinned submodule before this command or make verify-source detect and initialize the missing gitlink; the documented command was reproduced failing in that context.

AGENTS.md reference: AGENTS.md:L136-L137

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@@ -0,0 +1,100 @@
# FlashInfer GDN SM120 artifact generation

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P1 Badge Add the required model-line decision record

This commit introduces a large Qwen3.5 backend candidate, artifact contract, accuracy gates, and benchmark workflow, but records it only in a tool-local README; no relevant docs/models/qwen35/ document or docs/index.md route is created or updated. Add the model-line task/decision record so the rationale, validation status, blockers, and next action remain discoverable under the repository's required documentation workflow.

AGENTS.md reference: AGENTS.md:L160-L164

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@xiaguan

xiaguan commented Aug 11, 2026

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Thanks for exploring this direction. I think keeping the FlashInfer CuTe DSL kernel is reasonable: if we AOT-compile it, the serving runtime can avoid Python, Triton, JIT compilation, and JIT cache management.

The main change I would suggest is to simplify the integration boundary before expanding the candidate further. Today, compile_sm120.py:86-88 extracts FlashInfer's patched/raw PTX, while flashinfer_gdn.rs:65-72 freezes the generated entry symbol and naked launch ABI and flashinfer_gdn.rs:426-459 reconstructs that ABI in Rust. At the same time, lib.rs:101-102 explicitly keeps production launch APIs Triton-only. This leaves PegaInfer maintaining a private CuTe/PTX/TMA contract without yet achieving the original runtime goal.

Could we reshape the PR around this smaller end-to-end boundary?

  1. Let pegainfer-kernels own the pinned, reproducible CuTe build, patched artifact, manifest, and a stable generated C ABI.
  2. Let pegainfer-qwen35 call only that wrapper; it should not know the generated CuTe symbol or PTX/TMA argument layout.
  3. Wire the supported SM120 case into the real production dispatch, with unsupported shapes/configurations handled explicitly.
  4. Validate correctness and report end-to-end A/B measurements on that exact production path before treating it as a performance win.

pegainfer-kernels/tools/cutedsl/export_glm52_fp8_dsl.py:181 is the closest repository pattern. FlashInfer's SM120 path additionally patches PTX after cute.compile, so the export flow must preserve that patched artifact (ideally through an upstream-supported export path) rather than applying export_to_c blindly.

This keeps the useful CuTe kernel and the goal of removing Triton from serving, while giving the runtime a boundary we can maintain.

@qwzx-qwas

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Thanks, this makes sense. I’ll reshape the PR around the smaller integration boundary you suggested

@xiaguan

xiaguan commented Aug 13, 2026

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Thanks — the new C ABI boundary is a substantial improvement.

One remaining request is scope reduction. The PR is still +6,711 lines across 43 files, and much of that is staged diagnostics and benchmark infrastructure rather than the production integration itself. Please keep this PR focused on the production wrapper/dispatch, one reproducible generation path, and the essential end-to-end correctness/performance checks. The stage7/stage13 diagnostics, ABBA harnesses, and additional research scaffolding can move to follow-up PRs or external artifacts.

That would make the runtime change much easier to review and maintain without losing the useful validation work.

@qwzx-qwas

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Following the review feedback, I have completed the integration-boundary refactor and production-path validation for the SM120 FlashInfer GDN prefill candidate.

The review requested that the FlashInfer CuTe kernel remain AOT-compiled while moving all generated CuTe/PTX/TMA details out of pegainfer-qwen35. The current integration is now:

FlashInfer/CuTe generation environment
→ patched AOT object with embedded SM120 CUBIN
→ manifest + statically linked CuTe runtime
→ PegaInfer-owned versioned C ABI
→ pegainfer-kernels Rust wrapper
→ pegainfer-qwen35 semantic GDN operation
→ production dispatch

pegainfer-kernels now owns the pinned source, patch, generator, artifact validation, generated kernel symbol, TMA descriptors, raw launch ABI, native prepare kernel, and static runtime linkage.

pegainfer-qwen35 only sees the semantic Qwen35GdnAot interface, geometry, typed device buffers, workspace, and backend evidence. It no longer constructs or depends on generated CuTe symbols, TMA layouts, PTX, or the raw C launch ABI.

The supported single-GPU SM120 Qwen3.5-4B Hv32 case is now connected to production dispatch, while unsupported capabilities explicitly retain the Triton fallback. Invalid artifact/ABI/hash/geometry combinations fail validation rather than silently executing an incompatible kernel.

Serving-path validation

The serving path was also tested with an empty environment and with PTX JIT disabled.

Real inference completed successfully using the embedded native CUBIN and statically linked runtime, without requiring Python, Triton JIT, FlashInfer Python, or the CuTe compiler at serving time.

Cross-machine validation

I validated the refactored code on two RTX 5090 machines:

Machine Driver AOT object
Machine 1 580.126.09 d92be4c...efa17
Machine 2 580.126.20 5ceae281...2cd0c

Both machines used CUDA Toolkit 12.8 and the same source commit, FlashInfer submodule, generator, patch, and pinned package versions.

Each machine generated its object reproducibly within that machine, but the object hashes differed across machines. Both objects were exactly 291,336 bytes and passed the complete correctness suite.

This validates the runtime ABI and numerical behavior, while bitwise cross-machine artifact reproducibility remains an open build-boundary issue.

Correctness

On both machines, the Hv32 production candidate passed:

  • stable-ABI alias/separate-state tests;
  • all operator lengths T=1,2,63,64,65,127,128;
  • short- and long-sequence HF fixtures;
  • chunked/resumed prefill;
  • prefill-to-decode handoff;
  • scheduler and slot-reuse coverage;
  • CUDA Graph coverage.

Production dispatch selected FlashInfer, and the successful-launch counters increased as expected, confirming that the tests did not silently fall back to Triton.

The production HF short replay also remained stable across machines:

Machine Mean p50 p99 Max
Machine 1 0.0251 0.0175 0.0962 0.1367
Machine 2 0.0256 0.0168 0.0992 0.1367

The broader HF comparison against the same oracle remains:

Replay surface Triton mean / p99 / max FlashInfer mean / p99 / max
Short sequential 0.0268 / 0.0985 / 0.1827 0.0256 / 0.0992 / 0.1367
Batched, 5 padded 0.0268 / 0.0973 / 0.1835 0.0273 / 0.1156 / 0.1781
Batched, 3 padded 0.0285 / 0.1019 / 0.1850 0.0280 / 0.0878 / 0.1124
Slot compaction 0.0267 / 0.1016 / 0.1829 0.0256 / 0.1106 / 0.1864
Long 4097/8192 0.0206 / 0.0721 / 0.0877 0.0199 / 0.0692 / 0.0692

FlashInfer therefore has a slightly better overall error distribution, although it is not uniformly better on every tail metric.

The non-production Hv48/T128 result is unchanged: FlashInfer has five localized state-tail violations versus two for Triton. The A/B attribution continues to show that these originate from the upstream FlashInfer kernel rather than the PegaInfer HKV layout patch.

Performance

Machine 1 completed a 15-case same-production-path ABBA matrix covering:

  • T=63/64/65/128/2048
  • c1/c4/c8

FlashInfer won TTFT p50 in 14/15 cases and throughput in 12/15 cases.

The case-level geometric-mean improvements were:

  • TTFT p50: +4.26%
  • Throughput: +3.94%
  • TPOT p50: -0.11% (effectively unchanged)

One case, T2048/c8, regressed by 1.95% in TTFT p50 and 2.59% in throughput. In that profile, the FlashInfer GDN operator was 7.94% slower despite reducing the GDN launch count by 3×.

Machine 2 repeated representative cases:

Case TTFT p50 Throughput TPOT p50
T128/c1 +3.99% +0.84% -0.34%
T2048/c1 +2.48% +1.65% -0.39%
T2048/c8 +0.08% -0.02% +0.08%

On Machine 2, the earlier c8 regression did not reproduce: T2048/c8 was effectively at parity.

Nsight Systems measured FlashInfer GDN GPU time as:

  • 28.9% lower at T128/c1;
  • 6.0% lower at T2048/c1;
  • 6.3% lower at T2048/c8.

Scratch allocation remains approximately 48.52 MiB for FlashInfer versus 184.50 MiB for Triton, a 73.70% reduction.

The c8 traces show that per-launch FlashInfer time remains stable, while the current single-sequence operation is repeated once per sequence.

Based on this analysis, the next optimization directions are multi-sequence batching and native-prepare optimization.

The existing Triton capability fallback and Hv48 diagnostic scope remain unchanged while the maintainers decide the final release and distribution policy.

After the optimization work is complete, I will also clean up the PR itself by removing the staged diagnostic tooling, benchmark infrastructure, and other temporary research scaffolding that is not required for the production integration. The goal is to keep the final PR focused and minimal, preserving only the production integration, reproducible generation path, and essential correctness/performance validation needed for long-term maintainability.

@qwzx-qwas

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Following the review feedback, I have completed the integration-boundary refactor, scope reduction, native-prepare optimization, and production-path validation for the SM120 FlashInfer GDN prefill candidate.

Current integration boundary

The integration now follows this path:

FlashInfer/CuTe generation environment
→ patched AOT object containing an SM120 CUBIN
→ validated manifest + statically linked CuTe runtime
→ PegaInfer-owned versioned C ABI
→ pegainfer-kernels Rust wrapper
→ pegainfer-qwen35 semantic GDN operation
→ production dispatch

pegainfer-kernels owns the pinned source, HKV patch, production-only generator, artifact validation, generated kernel symbol, TMA descriptors, raw launch ABI, native prepare kernel, and static runtime linkage.

pegainfer-qwen35 only sees the semantic Qwen35GdnAot interface, supported geometry, typed device buffers, workspace, and backend evidence. It no longer constructs or depends on generated CuTe symbols, TMA layouts, PTX, or the raw C launch ABI.

The supported single-GPU SM120 Qwen3.5-4B Hv32 case is connected to production dispatch. Unsupported capabilities explicitly retain the Triton fallback. If an eligible FlashInfer configuration selects an invalid, incomplete, or ABI-incompatible artifact, validation fails instead of silently executing another kernel.

The README now documents the complete reproducible local path:

  1. Initialize the pinned FlashInfer submodule.
  2. Create the isolated Python 3.12.3 / CUDA 13 generation environment.
  3. Install the locked dependencies.
  4. Generate the production-only bundle.
  5. Validate the bundle.
  6. Configure the build variables.
  7. Link the release binary.

PR scope reduction

The PR has been reduced from 43 files and approximately 6,711 added lines to 34 files and approximately 3.7k added lines.

The stage7/stage13 harnesses, ABBA infrastructure, profiling scripts, generated artifacts, logs, benchmark JSON, and other temporary research scaffolding have been removed.

The remaining scope is limited to:

  • the production wrapper and dispatch;
  • one reproducible artifact-generation path;
  • the stable ABI and manifest contract;
  • essential operator and production-path correctness tests;
  • the native Hv32 prepare implementation.

Serving validation

The serving path was tested with an empty environment and again with PTX JIT disabled.

Real inference completed using the embedded native CUBIN and statically linked runtime, without requiring Python, Triton JIT, FlashInfer Python, or the CuTe compiler at serving time.

Cross-machine validation

The refactored implementation was validated on two RTX 5090 machines:

Machine Driver AOT object
Machine 1 580.126.09 d92be4c...efa17
Machine 2 580.126.20 5ceae281...2cd0c

Both used CUDA Toolkit 12.8 and the same source commit, FlashInfer submodule, generator, patch, and pinned package versions.

Generation was bitwise reproducible when repeated on the same machine. The objects differed across machines, although both were exactly 291,336 bytes and passed the complete correctness suite.

The runtime ABI and numerical behavior are therefore validated, while cross-machine bitwise artifact reproducibility remains an open build/distribution question.

Correctness

The Hv32 production candidate passed:

  • stable-ABI alias/separate-state coverage;
  • operator lengths T=1,2,63,64,65,127,128;
  • short- and long-sequence HF fixtures;
  • chunked/resumed prefill;
  • prefill-to-decode handoff;
  • scheduler and slot-reuse coverage;
  • CUDA Graph coverage;
  • native-prepare dynamic-length and non-finite-input coverage.

Production tests reported:

selected_backend=flashinfer

and successful-launch counters increased as expected, confirming that the tests did not silently fall back to Triton.

The latest final gate on commit 9e70e86a regenerated the production-only artifact and passed artifact validation, release linking, native-prepare correctness, and production HF short replay:

Mean p50 p99 Max
0.0258 0.0177 0.1058 0.1367

The broader comparison against the same HF oracle remains:

Replay surface Triton mean / p99 / max FlashInfer mean / p99 / max
Short sequential 0.0268 / 0.0985 / 0.1827 0.0256 / 0.0992 / 0.1367
Batched, 5 padded 0.0268 / 0.0973 / 0.1835 0.0273 / 0.1156 / 0.1781
Batched, 3 padded 0.0285 / 0.1019 / 0.1850 0.0280 / 0.0878 / 0.1124
Slot compaction 0.0267 / 0.1016 / 0.1829 0.0256 / 0.1106 / 0.1864
Long 4097/8192 0.0206 / 0.0721 / 0.0877 0.0199 / 0.0692 / 0.0692

FlashInfer has a lower mean error in four of five replay surfaces and a lower maximum error in four of five, but a lower p99 in only two of five.

It is slightly better overall, but not uniformly better on every tail metric.

The non-production Hv48/T128 investigation remains unchanged: FlashInfer has five localized final-state tail violations versus two for Triton.

Patched-HKV versus upstream-HVK A/B testing produced identical results after layout conversion, attributing these violations to the upstream kernel rather than the PegaInfer HKV patch.

Performance

Machine 1 completed a 15-case same-production-path ABBA matrix covering T=63/64/65/128/2048 and c1/c4/c8.

FlashInfer won:

  • TTFT p50 in 14/15 cases;
  • throughput in 12/15 cases.

The case-level geometric-mean results were:

  • TTFT p50: 4.26% better;
  • throughput: 3.94% better;
  • TPOT p50: 0.11% worse, effectively unchanged.

The T2048/c8 case regressed by 1.95% in TTFT p50 and 2.59% in throughput.

In that trace, the FlashInfer GDN operator was 7.94% slower despite reducing the GDN launch count by approximately .

Machine 2 repeated representative cases:

Case TTFT p50 Throughput TPOT p50
T128/c1 +3.99% +0.84% -0.34%
T2048/c1 +2.48% +1.65% -0.39%
T2048/c8 +0.08% -0.02% +0.08%

The earlier c8 regression did not reproduce on Machine 2; T2048/c8 was effectively at parity.

Nsight Systems measured FlashInfer GDN GPU time as:

  • 28.9% lower at T128/c1;
  • 6.0% lower at T2048/c1;
  • 6.3% lower at T2048/c8.

FlashInfer scratch allocation is approximately 48.52 MiB versus 184.50 MiB for Triton, a 73.70% reduction.

The native Hv32 prepare optimization was also validated independently. Relative to the previous production implementation, the ABBA means were:

Case TTFT p50 Throughput
T128/c1 +0.86% +0.30%
T2048/c1 +0.89% +0.62%
T2048/c8 +0.66% +0.61%

The optimization therefore provides a small, consistent improvement without changing the selected artifact or production numerical gates.

Multi-sequence batching remains a follow-up and is not part of the current PR.

Maintainer decisions still needed

The remaining policy and scope decisions are:

  1. Whether the current Triton capability fallback should remain long-term or eventually be removed for supported SM120 configurations.
  2. Whether official artifacts should be distributed as prebuilt bundles, generated locally by users, or support both paths.
  3. Which environment should be the canonical artifact build environment, given the observed cross-machine object-hash difference.
  4. Whether the non-production Hv48 generic prepare and diagnostic support should remain in this PR or move to a follow-up. It is not required by the Hv32 production artifact or dispatch.
  5. Which reference machine and variance threshold should define the final performance acceptance criterion, particularly for T2048/c8.

The current implementation keeps the conservative Triton capability fallback and retains the Hv48 diagnostic path until these decisions are made.

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