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Add MAPO testcases and latch nic MAPO both in hw state and in the IFR #433

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Add MAPO testcases and latch nic MAPO both in hw state and in the IFR #433

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@nathanaelhuffman nathanaelhuffman commented Nov 7, 2025 •
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A bunch of simulation work to get us higher-fidelity and better test coverage of MAPO faults.

  • Better coverage of A1/A0 faults in simulation. No hw changes in the A1/A0 sequencing
  • Better coverage of the NIC mapo faults. This testing enumerated some missing features and issues in the NIC state machine implementation that have now been fixed:
    • No NICMAPO flag reported in IFR registers. This wasn't wired up and didn't stick. Now wired up and tested in testcases.
    • NICMAPO wasn't sticky, hardware state machine would immediately attempt to re-sequence. Fixed to work like A1/A0 state machine where fault latches and requires and off/on commanded transistion.

Aaron-Hartwig
Aaron-Hartwig approved these changes Nov 7, 2025
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Great to see the extra sim coverage and NIC interrupt support!

hdl/projects/cosmo_seq/sequencer/seq_sync.vhd
-- TODO: maybe clean up the PG_Ls here


-- HSC's a re actually pg_l signals, so invert them here
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Suggested change
-- HSC's a re actually pg_l signals, so invert them here
-- HSC's are actually pg_l signals, so invert them here

hdl/projects/cosmo_seq/sequencer/sequencer_io_pkg.vhd

-- effectively one enable fires all of this due to the
-- effectively one enable fires all of this due to the
-- hardware design.n
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-- hardware design.n
-- hardware design.

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@nathanaelhuffman @Aaron-Hartwig