AMD Venice MCA patches for VeLinux (6.6 kernel)#110

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mohanasv2 wants to merge 52 commits intoopenvelinux:6.6-velinuxfrom

mohanasv2:venice_mce_patches_6.6

Commits on Mar 20, 2026

x86/mce: Don't remove sysfs if thresholding sysfs init fails

yghannam
authored and
mohanasv2
committed
x86/mce: Remove old CMCI storm mitigation code

aegl
authored and
mohanasv2
committed
x86/mce: Add per-bank CMCI storm mitigation

aegl
authored and
mohanasv2
committed
x86/mce: Ensure user polling settings are honored when restarting timer

yghannam
authored and
mohanasv2
committed
x86/mce/amd: Add default names for MCA banks and blocks

yghannam
authored and
mohanasv2
committed
x86/mce/amd: Fix threshold limit reset

yghannam
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mohanasv2
committed
x86/mce/amd: Rename threshold restart function

yghannam
authored and
mohanasv2
committed
x86/mce/amd: Remove return value for mce_threshold_{create,remove}_device()

yghannam
authored and
mohanasv2
committed
x86/mce/amd: Remove smca_banks_map

yghannam
authored and
mohanasv2
committed
x86/mce/amd: Remove shared threshold bank plumbing

yghannam
authored and
mohanasv2
committed
x86/mce/amd: Put list_head in threshold_bank

yghannam
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mohanasv2
committed
x86/mce: Remove __mcheck_cpu_init_early()

yghannam
authored and
mohanasv2
committed
x86/mce: Set CR4.MCE last during init

yghannam
authored and
mohanasv2
committed
x86/mce: Define BSP-only init

yghannam
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mohanasv2
committed
x86/mce: Define BSP-only SMCA init

yghannam
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mohanasv2
committed
x86/MCE/AMD: Split amd_mce_is_memory_error()

yghannam
authored and
mohanasv2
committed
x86/mce: Define amd_mce_usable_address()

yghannam
authored and
mohanasv2
committed
x86/mce: Cleanup mce_usable_address()

yghannam
authored and
mohanasv2
committed
x86/mce: Remove redundant check from mce_device_create()

Nikolay Borisov
authored and
mohanasv2
committed
x86/mce: Dynamically size space for machine check records

aegl
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mohanasv2
committed
x86/mce: Clean up TP_printk() output line of the 'mce_record' tracepoint

ingomolnar
authored and
mohanasv2
committed
tracing: Add the ::ppin field to the mce_record tracepoint

Avadhut Naik
authored and
mohanasv2
committed
tracing: Add the ::microcode field to the mce_record tracepoint

Avadhut Naik
authored and
mohanasv2
committed
x86/mce: Switch to new Intel CPU model defines

aegl
authored and
mohanasv2
committed
x86/mce: Remove unused variable and return value in machine_check_poll()

yghannam
authored and
mohanasv2
committed
x86/mce: Rename mce_setup() to mce_prep_record()

yghannam
authored and
mohanasv2
committed
x86/mce: Define mce_prep_record() helpers for common and per-CPU fields

yghannam
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mohanasv2
committed
x86/mce: Use mce_prep_record() helpers for apei_smca_report_x86_error()

yghannam
authored and
mohanasv2
committed
x86/mce: Add wrapper for struct mce to export vendor specific info

Avadhut Naik
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mohanasv2
committed
x86/mce: Make several functions return bool

qzhuo2
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mohanasv2
committed
x86/mce: Make four functions return bool

qzhuo2
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mohanasv2
committed
x86/mce: Break up __mcheck_cpu_apply_quirks()

aegl
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mohanasv2
committed
x86/mce: Do 'UNKNOWN' vendor check early

yghannam
authored and
mohanasv2
committed
x86/mce: Cleanup bank processing on init

suryasaimadhu
authored and
mohanasv2
committed
x86/cpu/intel: Replace PAT erratum model/family magic numbers with symbolic IFM references

hansendc
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mohanasv2
committed
x86/mce: Convert family/model mixed checks to VFM-based checks

qzhuo2
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mohanasv2
committed
x86/mce: Separate global and per-CPU quirks

yghannam
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mohanasv2
committed
x86/mce: Move machine_check_poll() status checks to helper functions

yghannam
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mohanasv2
committed
x86/MCE/AMD: Add support for new MCA_SYND{1,2} registers

Avadhut Naik
authored and
mohanasv2
committed
x86/msr: Rename 'mce_rdmsrl()' to 'mce_rdmsrq()'

ingomolnar
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mohanasv2
committed
x86/msr: Rename 'mce_wrmsrl()' to 'mce_wrmsrq()'

ingomolnar
authored and
mohanasv2
committed
x86/mce: Add a clear_bank() helper

yghannam
authored and
mohanasv2
committed
x86/mce: Unify AMD THR handler with MCA Polling

yghannam
authored and
mohanasv2
committed
x86/mce: Unify AMD DFR handler with MCA Polling

yghannam
authored and
mohanasv2
committed
x86/mce/amd: Enable interrupt vectors once per-CPU on SMCA systems

yghannam
authored and
mohanasv2
committed
x86/mce/amd: Support SMCA Corrected Error Interrupt

yghannam
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mohanasv2
committed
x86/mce/amd: Remove redundant reset_block()

yghannam
authored and
mohanasv2
committed
x86/mce/amd: Define threshold restart function for banks

yghannam
authored and
mohanasv2
committed
x86/mce: Save and use APEI corrected threshold limit

yghannam
authored and
mohanasv2
committed
x86/mce: Add support for physical address valid bit

Avadhut Naik
authored and
mohanasv2
committed
x86/mce: Do not clear bank's poll bit in mce_poll_banks on AMD SMCA systems

Avadhut Naik
authored and
mohanasv2
committed
x86/mce: Handle AMD threshold interrupt storms

skoralah
authored and
mohanasv2
committed