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Hardware support wishlist: nRF54LM20 #112

Description

@chrysn

Quickly tried porting things over so I can test better locally.

This didn't work out: nRF54L15 and nRF54LM20's verison of Cracen differ by more than just using a different CRACEN base address. Compare:

How much they differ I don't known, but enough that commenting out the "Pulse softrst to flush the conditioner and FIFO" area, switching the .cargo/config.toml parameters around, and altering the base address do not suffice, and it still crashes at attempting to load the microcode.

Diff from current main for reference

(note the --disable-double-buffering, which works around probe-rs/probe-rs#3775)

diff --git a/embedded-cal-nrf54l15/.cargo/config.toml b/embedded-cal-nrf54l15/.cargo/config.toml
index 4e2464f..f7178dc 100644
--- a/embedded-cal-nrf54l15/.cargo/config.toml
+++ b/embedded-cal-nrf54l15/.cargo/config.toml
@@ -2,7 +2,7 @@
 # SPDX-FileCopyrightText: Inria-AIO, Cryspen, and Christian Amsüss
 
 [target.'cfg(all(target_arch = "arm", target_os = "none"))']
-runner = ["probe-rs", "run", "--chip", "nRF54L15", "--log-format=oneline", "--allow-erase-all", "--verify"]
+runner = ["probe-rs", "run", "--chip", "nRF54LM20A", "--log-format=oneline", "--allow-erase-all", "--verify", "--preverify", "--disable-double-buffering"]
 
 rustflags = [
   "-C", "linker=flip-link",
diff --git a/embedded-cal-nrf54l15/Cargo.toml b/embedded-cal-nrf54l15/Cargo.toml
index 55c7d23..ef8bc02 100644
--- a/embedded-cal-nrf54l15/Cargo.toml
+++ b/embedded-cal-nrf54l15/Cargo.toml
@@ -23,7 +23,7 @@ harness = false
 
 [dependencies]
 embedded-cal.path = "../embedded-cal"
-nrf-pac = { version = "0.2.0", features = ["nrf54l15-app", "rt"] }
+nrf-pac = { version = "0.2.0", features = ["nrf54lm20a-app", "rt"] }
 rand_core.workspace = true
 zeroize = { version = "1.8.2", default-features = false, features = ["derive"]}
 
diff --git a/embedded-cal-nrf54l15/src/lib.rs b/embedded-cal-nrf54l15/src/lib.rs
index 4373757..d4ddb7b 100644
--- a/embedded-cal-nrf54l15/src/lib.rs
+++ b/embedded-cal-nrf54l15/src/lib.rs
@@ -62,6 +62,8 @@ impl Nrf54l15Cal {
         // Load PKE microcode immediately after enabling the PKE/IKG block
         unsafe { microcode::load() };
 
+        todo!("failing deliberately at init");
+
         // Enable the NDRNG; it stays on until Drop.
         cracen_core
             .rngcontrol()
diff --git a/embedded-cal-nrf54l15/src/microcode.rs b/embedded-cal-nrf54l15/src/microcode.rs
index fcb95ba..5a4eecd 100644
--- a/embedded-cal-nrf54l15/src/microcode.rs
+++ b/embedded-cal-nrf54l15/src/microcode.rs
@@ -7,7 +7,9 @@
 
 mod data;
 
-pub(crate) const BASE: u32 = 0x5180_C000;
+pub(crate) const BASE: u32 = 0x50050000 + 0xc000; // NRF_CRACENCORE_BASE + 0xc000
+                                          // nRF54L15: 0x51800000
+                                          // nRF54LM20: 0x50050000
 
 pub(super) unsafe fn load() {
     let mut p = BASE as *mut u32;
diff --git a/embedded-cal-nrf54l15/src/try_rng.rs b/embedded-cal-nrf54l15/src/try_rng.rs
index 272e172..82adca3 100644
--- a/embedded-cal-nrf54l15/src/try_rng.rs
+++ b/embedded-cal-nrf54l15/src/try_rng.rs
@@ -2,7 +2,7 @@
 // SPDX-FileCopyrightText: Inria-AIO, Cryspen, and Christian Amsüss
 
 use crate::Nrf54l15Cal;
-use nrf_pac::cracencore::vals::{ControlSoftrst, State};
+use nrf_pac::cracencore::vals::State;
 const MAX_TRNG_RESTARTS: u32 = 3;
 
 impl rand_core::TryCryptoRng for Nrf54l15Cal {}
@@ -48,14 +48,15 @@ impl rand_core::TryRng for Nrf54l15Cal {
                 }
 
                 // Pulse softrst to flush the conditioner and FIFO
-                self.cracen_core
-                    .rngcontrol()
-                    .control()
-                    .modify(|w| w.set_softrst(ControlSoftrst::CTEST));
-                self.cracen_core
-                    .rngcontrol()
-                    .control()
-                    .modify(|w| w.set_softrst(ControlSoftrst::NORMAL));
+                // (only nRF54L15 and not LM20?)
+//                 self.cracen_core
+//                     .rngcontrol()
+//                     .control()
+//                     .modify(|w| w.set_softrst(ControlSoftrst::CTEST));
+//                 self.cracen_core
+//                     .rngcontrol()
+//                     .control()
+//                     .modify(|w| w.set_softrst(ControlSoftrst::NORMAL));
                 self.cracen_core
                     .rngcontrol()
                     .control()

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