Optimise traversal iterators

src/peakrdl_python/lib_test/_common_base_test_class.py

@@ -26,6 +26,16 @@
 from ..lib import FieldEnumReadWrite, FieldEnumReadOnly, FieldEnumWriteOnly
 from ..lib import FieldAsyncReadOnly, FieldAsyncWriteOnly, FieldAsyncReadWrite
 from ..lib import FieldEnumAsyncReadOnly, FieldEnumAsyncWriteOnly, FieldEnumAsyncReadWrite
+from ..lib import RegReadOnly, RegReadWrite, RegWriteOnly
+from ..lib import RegAsyncReadOnly, RegAsyncReadWrite, RegAsyncWriteOnly
+from ..lib import AddressMap, AsyncAddressMap
+from ..lib import RegFile, AsyncRegFile
+from ..lib import MemoryReadOnly, MemoryReadOnlyLegacy
+from ..lib import MemoryWriteOnly, MemoryWriteOnlyLegacy
+from ..lib import MemoryReadWrite, MemoryReadWriteLegacy
+from ..lib import MemoryAsyncReadOnly, MemoryAsyncReadOnlyLegacy
+from ..lib import MemoryAsyncWriteOnly, MemoryAsyncWriteOnlyLegacy
+from ..lib import MemoryAsyncReadWrite, MemoryAsyncReadWriteLegacy
 from ..lib.base_register import BaseReg
 from ..lib import Base
 from .utilities import get_field_bitmask_int, get_field_inv_bitmask
@@ -136,3 +146,124 @@ def _test_node_inst_name(self,
         self.assertEqual(dut.inst_name, inst_name)
         full_inst_name = parent_full_inst_name + '.' + inst_name
         self.assertEqual(dut.full_inst_name, full_inst_name)
+
+    def _test_field_iterators(self, *,
+                              rut: Union[RegReadOnly,
+                                            RegReadWrite,
+                                            RegWriteOnly,
+                                            RegAsyncReadOnly,
+                                            RegAsyncReadWrite,
+                                            RegAsyncWriteOnly],
+                              has_sw_readable: bool,
+                              has_sw_writable: bool,
+                              readable_fields: set[str],
+                              writeable_fields: set[str]) -> None:
+        if has_sw_readable:
+            if not isinstance(rut, (RegReadOnly,
+                                    RegReadWrite,
+                                    RegAsyncReadOnly,
+                                    RegAsyncReadWrite,
+                                    )):
+                raise TypeError(f'Register was expected to readable, got {type(rut)}')
+
+            child_readable_field_names = { field.inst_name for field in rut.readable_fields}
+
+            self.assertEqual(readable_fields, child_readable_field_names)
+        else:
+            self.assertFalse(hasattr(rut, 'readable_fields'))
+            # check the readable_fields is empty
+            self.assertFalse(readable_fields)
+
+        if has_sw_writable:
+            if not isinstance(rut, (RegWriteOnly,
+                                    RegReadWrite,
+                                    RegAsyncWriteOnly,
+                                    RegAsyncReadWrite,
+                                    )):
+                raise TypeError(f'Register was expected to writable, got {type(rut)}')
+
+            child_writeable_fields_names = {field.inst_name for field in rut.writable_fields}
+
+            self.assertEqual(writeable_fields, child_writeable_fields_names)
+        else:
+            self.assertFalse(hasattr(rut, 'writeable_fields'))
+            # check the writeable_fields is empty
+            self.assertFalse(writeable_fields)
+
+        child_field_names = {field.inst_name for field in rut.fields}
+        self.assertEqual(readable_fields | writeable_fields, child_field_names)
+
+    def _test_register_iterators(self,
+                                 dut: Union[AddressMap, AsyncAddressMap, RegFile, AsyncRegFile,
+                                            MemoryReadOnly, MemoryReadOnlyLegacy,
+                                            MemoryWriteOnly, MemoryWriteOnlyLegacy,
+                                            MemoryReadWrite, MemoryReadWriteLegacy,
+                                            MemoryAsyncReadOnly, MemoryAsyncReadOnlyLegacy,
+                                            MemoryAsyncWriteOnly, MemoryAsyncWriteOnlyLegacy,
+                                            MemoryAsyncReadWrite, MemoryAsyncReadWriteLegacy],
+                                 readable_registers: set[str],
+                                 writeable_registers: set[str]) -> None:
+
+        if isinstance(dut, (AddressMap, AsyncAddressMap, RegFile, AsyncRegFile,
+                            MemoryReadOnly, MemoryReadOnlyLegacy,
+                            MemoryReadWrite, MemoryReadWriteLegacy,
+                            MemoryAsyncReadOnly, MemoryAsyncReadOnlyLegacy,
+                            MemoryAsyncReadWrite, MemoryAsyncReadWriteLegacy)):
+            child_readable_reg_names = { reg.inst_name for reg in
+                                         dut.get_readable_registers(unroll=True)}
+            self.assertEqual(readable_registers, child_readable_reg_names)
+        else:
+            self.assertFalse(hasattr(dut, 'get_readable_registers'))
+
+        if isinstance(dut, (AddressMap, AsyncAddressMap, RegFile, AsyncRegFile,
+                            MemoryWriteOnly, MemoryWriteOnlyLegacy,
+                            MemoryReadWrite, MemoryReadWriteLegacy,
+                            MemoryAsyncWriteOnly, MemoryAsyncWriteOnlyLegacy,
+                            MemoryAsyncReadWrite, MemoryAsyncReadWriteLegacy)):
+            child_writable_reg_names = {reg.inst_name for reg in
+                                        dut.get_writable_registers(unroll=True)}
+            self.assertEqual(writeable_registers, child_writable_reg_names)
+        else:
+            self.assertFalse(hasattr(dut, 'get_writable_registers'))
+
+        child_reg_names = {field.inst_name for field in dut.get_registers(unroll=True)}
+        self.assertEqual(readable_registers | writeable_registers, child_reg_names)
+
+
+    def _test_memory_iterators(self,
+                               dut: Union[AddressMap, AsyncAddressMap],
+                               memories: set[str]) -> None:
+        child_mem_names = {reg.inst_name for reg in dut.get_memories(unroll=True)}
+        self.assertEqual(memories, child_mem_names)
+
+    def __test_section_iterators(self,
+                                 dut: Union[AddressMap, AsyncAddressMap, RegFile, AsyncRegFile],
+                                 sections: set[str]) -> None:
+        child_section_names = {reg.inst_name for reg in dut.get_sections(unroll=True)}
+        self.assertEqual(sections, child_section_names)
+
+    def _test_addrmap_iterators(self, *,
+                                dut: Union[AddressMap, AsyncAddressMap],
+                                memories: set[str],
+                                sections: set[str],
+                                readable_registers: set[str],
+                                writeable_registers: set[str]) -> None:
+        self._test_register_iterators(dut=dut,
+                                      readable_registers=readable_registers,
+                                      writeable_registers=writeable_registers)
+        self._test_memory_iterators(dut=dut,
+                                    memories=memories)
+        self.__test_section_iterators(dut=dut,
+                                      sections=sections)
+
+    def _test_regfile_iterators(self,
+                                dut: Union[RegFile, AsyncRegFile],
+                                sections: set[str],
+                                readable_registers: set[str],
+                                writeable_registers: set[str]) -> None:
+        self._test_register_iterators(dut=dut,
+                                      readable_registers=readable_registers,
+                                      writeable_registers=writeable_registers)
+        self.__test_section_iterators(dut=dut,
+                                      sections=sections)
+        self.assertFalse(hasattr(dut, 'get_memories'))

src/peakrdl_python/lib_test/async_reg_base_test_class.py

@@ -318,13 +318,21 @@ async def _single_enum_field_read_and_write_test(
                                                       enum_definition=enum_definition)
 
     async def _single_register_read_and_write_test(
-            self,
+            self, *,
             rut: Union[RegAsyncReadOnly, RegAsyncReadWrite, RegAsyncWriteOnly],
             has_sw_readable: bool,
-            has_sw_writable: bool) -> None:
+            has_sw_writable: bool,
+            readable_fields: set[str],
+            writeable_fields: set[str]) -> None:
 
         # the register properties are tested separately so are available to be used here
 
+        self._test_field_iterators(rut=rut,
+                                   has_sw_readable=has_sw_readable,
+                                   has_sw_writable=has_sw_writable,
+                                   readable_fields=readable_fields,
+                                   writeable_fields=writeable_fields)
+
         await self.__single_register_simulator_read_and_write_test(
             rut=rut,
             has_sw_readable=has_sw_readable,

src/peakrdl_python/lib_test/base_reg_test_class.py

@@ -309,13 +309,21 @@ def _single_enum_field_read_and_write_test(
             self.__single_enum_field_write_test(fut=fut,
                                                 enum_definition=enum_definition)
 
-    def _single_register_read_and_write_test(self,
+    def _single_register_read_and_write_test(self, *,
                                              rut: Union[RegReadOnly, RegReadWrite, RegWriteOnly],
                                              has_sw_readable: bool,
-                                             has_sw_writable: bool) -> None:
+                                             has_sw_writable: bool,
+                                             readable_fields: set[str],
+                                             writeable_fields: set[str]) -> None:
 
         # the register properties are tested separately so are available to be used here
 
+        self._test_field_iterators(rut=rut,
+                                   has_sw_readable=has_sw_readable,
+                                   has_sw_writable=has_sw_writable,
+                                   readable_fields=readable_fields,
+                                   writeable_fields=writeable_fields)
+
         self.__single_register_simulator_read_and_write_test(rut=rut,
                                                              has_sw_readable=has_sw_readable,
                                                              has_sw_writable=has_sw_writable)

src/peakrdl_python/templates/addrmap_register.py.jinja

@@ -93,7 +93,7 @@ class {{node.python_class_name}}({{node.base_class(asyncoutput)}}):
                     Memory{% if asyncoutput %}Async{% endif -%}ReadWrite{% if legacy_block_access %}Legacy{% endif %}
                  {%- elif node.read_only -%}
                     Readable{% if asyncoutput %}Async{% endif -%}Memory{% if legacy_block_access %}Legacy{% endif %}
-                 {%- elif node.read_only -%}
+                 {%- elif node.write_only -%}
                     Writable{% if asyncoutput %}Async{% endif -%}Memory{% if legacy_block_access %}Legacy{% endif %}
                  {%- endif -%}
                  ]):