Support ROCm memory efficient SageAttention - #730
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Pull request overview
This PR extends the memory-efficient SageAttention patches to work on ROCm/HIP by falling back to SageAttention’s public Triton/HIP backend when CUDA-arch detection is unavailable, while keeping the existing CUDA architecture-specific kernels intact.
Changes:
- Adds a HIP fallback import path for SageAttention when CUDA arch detection cannot be used.
- Uses the HIP SageAttention call path inside
_sageattn_int8_fp8_nhdwhen available. - Updates WanVideo and MiniMax H3 patch guards/error messages to allow ROCm/HIP usage.
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| _sageattn_hip = None | ||
| try: | ||
| from sageattention.core import per_thread_int8_triton, per_warp_int8_cuda, per_block_int8_triton, per_channel_fp8, get_cuda_arch_versions, attn_false | ||
| _cuda_archs = get_cuda_arch_versions() | ||
| except Exception: | ||
| pass | ||
| if torch.version.hip is not None: | ||
| try: | ||
| from sageattention import sageattn as _sageattn_hip | ||
| except ImportError: | ||
| pass |
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| if _sageattn_hip is not None: | ||
| return _sageattn_hip(q, k, v, tensor_layout="NHD", is_causal=False) | ||
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Summary
smXXdetectionValidation
python -m py_compile nodes/ltxv_nodes.pygit diff --checkMiniMaxH3MemoryEfficientSageAttentionPatch(1, 512, 4, 128)output was finite with matching shape/dtype; mean absolute difference vs SDPA0.000681, cosine similarity0.999924