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Signed-off-by: Joakim Bech joakim.bech@linaro.org

jforissier and others added 26 commits July 6, 2018 08:43
syscall_t is currently typedef'ed as TEE_Result (*)(void). It is used to
represent a pointer to any system call, in the syscall table for instance.
As such, the exact type behind syscall_t cannot reflect all the syscalls
since they have different prototypes. The current declaration with a
TEE_Result return type was probably chosen because it was a common
characteristic of all syscalls to return a TEE_Result.

However, this type causes compilation warnings with GCC 8.1:

core/arch/arm/tee/arch_svc.c:43:36: warning: cast between incompatible function types from ‘void (*)(long unsigned int)’ to ‘TEE_Result (*)(void)’ {aka ‘unsigned int (*)(void)’} [-Wcast-function-type]
 #define SYSCALL_ENTRY(_fn) { .fn = (syscall_t)_fn }
                                    ^
core/arch/arm/tee/arch_svc.c:50:2: note: in expansion of macro ‘SYSCALL_ENTRY’
  SYSCALL_ENTRY(syscall_sys_return),
  ^~~~~~~~~~~~~

The solution is to use 'void (*)(void)' instead, as explained in the GCC
documentation:

 -Wcast-function-type

  Warn when a function pointer is cast to an incompatible function
  pointer. [...] The function type void (*) (void) is special and matches
  everything, which can be used to suppress this warning. [...]

Link: [1] https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
NOWERROR=1 has been made obsolete by commit beb065d ("Do not set
-Werror by default"). Remove it.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
When CFG_TEE_CORE_LOG_LEVEL=0 to make, met build failure:
"
core/arch/arm/kernel/abort.c: In function '__print_stack_unwind_arm32':
core/arch/arm/kernel/abort.c:113:2: error: too many arguments to function 'print_stack_arm32'
  print_stack_arm32(TRACE_ERROR, &state, exidx, exidx_sz, kernel_stack,
  ^~~~~~~~~~~~~~~~~
"

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Adds a separate build with only CFG_TEE_CORE_LOG_LEVEL=0 set.

Needed to catch the error fixed in
OP-TEE#2454

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
There seems to be an issue that if RPMB_FS is enabled in
OPTEE and TA is present in REE (normal file system), if
priority for secure storage TA is higher and RPMB
initialization fails, the error is returned and the
OPTEE doesn't goes to find the TA from REE TA store.

The issue is fixed by adding a 'continue' statement after
printing the respective error.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Sourabh Das <sourabhdas143@gmail.com>
Signed-off-by: Tao Lu <taolu@marvell.com>
Acked-by: Kevin Peng <kg-kevingarnett@hotmail.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
All the static user TA libraries supplied in $(libnames) are linked in
the same group using --start-group and --end-group so the order of the
libraries doesn't matter any more. Remove the complexity of reordering
the libraries.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Uses per $(sm) unique FORCE-GENSRC to allow one submodule (sm) depend on
files produced by another submodule.

CFG_IN_TREE_EARLY_TAS needs this for the core submodule to depend on a
submodule representing an in-tree TA.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Prepare for in-tree TA building by adding $(sm) to all TA dev-kit
variables that may cause conflicts either with the core linking or when
linking multiple TAs.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Replaces the old variables "binary" and "ldadd" with "user-ta-uuid" and
"user-ta-ldadd" respectively.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Adds support for compiling in-tree TAs. Unless specified via
CFG_USER_TA_TARGET_<ta-name> the TA will be built with the first TA
target (aka TA dev kit, when delivered) specified in the variable
ta-targets which is initialized in core/arch/arm/plat-*/conf.mk.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Adds an AVB TA to be used to provide required services for AVB in U-boot.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Adds CFG_IN_TREE_EARLY_TAS which is used to embed in-tree TAs as early
TAs in the OP-TEE binary.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
In order to support AVB in U-boot embed the AVB ta as an early TA.

Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Signed-off-by: Jordan Rhee <jordanrh@microsoft.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Jordan Rhee <jordanrh@microsoft.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The prefix `0` is removed in Linux Kernel upstream code,
so let's drop it to let wdog work.

Linux Kernel commit 67b8d5c7081221efa252("Linux 4.17-rc5")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
If (D|E|I|F)MSG is called with foreign interrupts masked
we can report core ID. "?" will be printed instead, if
foreign interrupts aren't masked.

With this patch log looks like this:

D/TC:2 0 core_mmu_set_user_map:940 0xe181b88 0xeee8003
D/TC:? 0 __wq_rpc:40 wake  thread 1 0xe16f028 -3
D/TC:1   thread_handle_std_smc:612 a7: 2
D/TC:3 0 core_mmu_set_user_map:940 0x0 0x0

Where first digit shows core id and second - thread id.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
There is no need for repeated checks for every portion of
extended prefix.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
The QEMU test environment has recently been upgraded to use U-Boot
("qemu.mk: replace bios with u-boot" [1] and "default.xml: replace
bios_qemu_tz_arm with u-boot" [2]), which requires GCC 6 or newer.

Fixes the following CI build error:

  *** Your GCC is older than 6.0 and is not supported
  make[1]: *** [checkgcc6] Error 1
  make: *** [u-boot] Error 2

Link: [1] OP-TEE/build@248f5733bf29
Link: [2] OP-TEE/manifest@2067ab3f9bbe
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Since custom load and verification methods for user TA is supported, the
sign tool also should be configurable.

Signed-off-by: Pengguang Zhu <zpghao@163.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
This is invalid use of realloc, because it can cause memory leak.

Signed-off-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
When compiling with -mcpu=cortex-a9, GCC 8.1 fails on the smc instruction:

 $ make -s PLATFORM=stm CROSS_COMPILE32=<GCC8.1 path>/arm-linux-gnueabihf-
 core/arch/arm/kernel/thread_a32.S: Assembler messages:
 core/arch/arm/kernel/thread_a32.S:44: Error: selected processor does not support `smc #0' in ARM mode
 [snip]
 mk/compile.mk:146: recipe for target 'out/arm-plat-stm/core/arch/arm/kernel/thread_a32.o' failed
 make: *** [out/arm-plat-stm/core/arch/arm/kernel/thread_a32.o] Error 1

Use the '.arch_extension sec' directive to allow the assembler to emit
the instruction.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Volodymyr Babchuk <vlad.babchuk@gmail.com>
Cleanup configuration to make it easy to add new platforms.
Make most configurations be common to CFG_MX6/7.
Normally only need to define CFG_DDR_SIZE and CFG_NS_ENTRY_ADDR
to support new platforms.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
jforissier and others added 25 commits December 3, 2018 18:00
Adds missing typedefs from lib/libutee/include/tee_api_types.h to
typedefs.checkpatch. This fixes checkpatch errors such as:

 ERROR: need consistent spacing around '*' (ctx:WxV)
 OP-TEE#807: FILE: lib/libutee/tee_api_arith_mpi.c:773:
 +void TEE_BigIntInitFMMContext(TEE_BigIntFMMContext *context __unused,
                                                     ^
The file is sorted in reverse alphabetical order, otherwise checkpatch
would ignore some entries that have a common radix (such as TEE_BigInt/
TEE_BigIntFMM/TEE_BigIntFMMContext). Not sure if it is expected or if it
will be fixed in upstream checkpatch at some point.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
There are actually 11 API calls in tee_entry_fast.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Add i.MX8MQ/MM EVK support.

i.MX8M family use Cortex-A53 as the CPU core, the i.MX8MQ EVK has
3GB DRAM memory, and i.MX8MM EVK has 2GB DRAM memory.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Added support for armv8 platform flavour.
     - PLATFORM = ls-lx2160ardb

Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
There is probably no-one using the Secure Element API. We have never heard
anyone asking questions about it, have no way to test it and we believe
it is not even working right now. Therefore, remove it.

- The reserved syscalls are still present, but return
TEE_ERROR_NOT_SUPPORTED
- The TEE_SE* functions (GlobalPlatform TEE Secure Element API,
GPD_SPE_024) are removed from libutee.a and the header file
tee_internal_se_api.h is removed as well

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
f934e29 ("mbedtls: add mbedtls_mpi_init_static()") from
branch import/mbedtls-2.6.1

Adds mbedtls_mpi_init_static() which initializes a mbedtls_mpi struct
with a fixed sized bignum array.

The old behavior to fall back on malloc allocations when memory pool
isn't configured is retained.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
213cce5 ("libmedtls: mpi_miller_rabin: increase count limit") from
branch import/mbedtls-2.6.1

Increase the count limit when generating the witness in the Rabin-Miller
primality test. The previous number 30 was too low to reliably detect
000000022770A7DC599BC90B2FF981CCB5CF05703344C8F350418AAD as a prime
number.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Renames tee_api_arith.c to tee_api_arith_mpa.c to make room for using
other bignum implementations.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Adds tee_api_arith_mpi.c wrapper providing the TEE Arithmetical API around
the big (mpi) routines from mbedtls.

CFG_TA_MBEDTLS_MPI=y (default y) enables the usage of the bignum routines
in libutee.

Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Introduce the binary image type information to the STM32 header
used for OP-TEE boot images.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
Correct the name of the script used to embed a DTB in the core
when added to the core dependency list.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
__thread_enter_user_mode() cannot be paged out, because the pager cannot
be invoked to restore any faulting code page after SP has been switched to
use SP_EL1. At this point, a synchronous exception would take the CPU to
the 0x200 offset in the exception vector, which corresponds to
[workaround_]el1_sync_sp1 and is an error-catching infinite loop. This
explains the behavior described in [1].

Add the requisite KEEP_PAGER so that the function is kept in the unpaged
area.

Fixes: [1] OP-TEE#2684
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Joakim Bech <joakim.bech@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Helper function to test if a virtual address points to an
unpaged memory section that is the linear address space when
pager is enabled.

When pager is disabled, is_unpaged() always returns true.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Introduce a framework for power management callback registering.

Drivers and services can register a callback function for the platform
suspend and resume sequences. A private address handle can be registered
with the callback and retrieved from the callback. Callback can be
registered with a specific call order as defined per PM_CB_ORDER_*.

Callback shall return an error if failing to complete target transition.
This information may be used by the platform to resume a platform on
non-fatal failure to suspend.

Callbacks are related to a callback level. It defines the callbacks
call ordering, allowing core low level drivers (as clocks or the GIC)
to be suspended after all drivers and resume before these.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Acked-by: Cedric Neveux <cedric.neveux@nxp.com>
Prior to this patch the non-secure VFP state was only saved when it
seemed necessary based on control registers.

To make sure that non-secure VFP state isn't corrupted always save the
entire register file before modifying it. This is now the same behavior
on both ARMv8-A and ARMv7-A platforms.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
When OPTEE is providing a DTB overlay to a subsequent boot stage CFG_DT
will be true as will CFG_EXTERNAL_DTB_OVERLAY.

In this case there will be no DTB for the imx watchdog driver to consume so
do not try to do so.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
When resetting a system that has not booted up with a full DTB in memory
the value ext_reset will always be false.

This patch introduces a platform define to tell the watchdog driver to
drive ext_reset.

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This patch adds an OP-TEE port for the i.MX7S WaRP7 for the MBED Linux OS
boot flow.

BootROM -> ATF/BL2
ATF     -> FIP {u-boot, OPTEE}
OPTEE   -> {populates DTB overlay}
u-boot  -> FIT {DTB, Kernel, initramfs}
           Merges DTB and OPTEE DTB-overlay
Linux

The current warp7 port looks like
BootROM -> u-boot
u-boot  -> Load {Kernel, OPTEE, DTB}
OPTEE
Linux

In order to support the ATF bootflow a new port of OP-TEE with slightly
tweaked parameters is added here.

CFG_NS_ENTRY_ADDR = 0x87800000 is the entry point of u-boot
CFG_DT_OVERLAY = y adds DTB overlay fragments to the passed DTB

make PLATFORM=imx-mx7swarp7_mbl

Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
+ added target for calling checkpatch on working and staging area
+ added documentation for targets in Readme

Signed-off-by: Markus S. Wamser <markus.wamser@mixed-mode.de>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Introduce new iomem util functions to set, clear or set and clear
bit masks in peripheral interfaces.

io_setbits32(addr, mask) sets the bits enabled in mask at address.
io_clrbits32(addr, mask) clears the bits enabled in mask.
io_clrsetbits32(addr, clear_mask, set_mask) clears the bits enabled in
clear_mask and sets the bits enabled in set_mask.

These functions are more friendly in instruction blocks to sets and
clears bitmasks in peripheral registers. They provide a more readable
implementation than playing with io_mask32() for the equivalent
sequence, for example, extracted from a DDR controller driver:

   (...)
   /* IOs powering down (PUBL registers) */

   io_setbits32(ddrphy_base + DDRPHYC_ACIOCR, DDRPHYC_ACIOCR_ACPDD);
   io_setbits_32(ddrphy_base + DDRPHYC_ACIOCR, DDRPHYC_ACIOCR_ACPDR);

   io_clrsetbits32(ddrphy_base + DDRPHYC_ACIOCR,
                   DDRPHYC_ACIOCR_CKPDD_MASK, DDRPHYC_ACIOCR_CKPDD_0);

   io_clrsetbits32(ddrphy_base + DDRPHYC_ACIOCR,
                   DDRPHYC_ACIOCR_CKPDR_MASK, DDRPHYC_ACIOCR_CKPDR_0);

   io_clrsetbits32(ddrphy_base + DDRPHYC_ACIOCR,
                   DDRPHYC_ACIOCR_CSPDD_MASK, DDRPHYC_ACIOCR_CSPDD_0);
   (...)

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
SHA-512/256 is an approved hash algorithm and a vetted conditioner as
per NIST.SP.800-90B spec. We have used it to condition raw thermal
sensor noise on Developerbox to condense entropy.

It is imported from libtomcrypt:
Git url: https://github.com/libtom/libtomcrypt.git, release tag: v1.18.0.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>
As an implementation of generic timer, arm64 platforms provides secure
EL1 physical timer. So enable corresponding framework. For more
information refer to section: D6.1.5 Timers - ARMv8-A RM.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>
Currently there is no means to perform background housekeeping in
secure world on Synquacer platforms. Use an (optional) periodic
timer to allow any housekeeping to be performed.

Although it could be expanded, at present the code is fairly simple
because we expect only a single PTA to exploit the timer interrupt.
The secure timer interrupt is configured to fire every 2ms.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>
This platform provides 7 on-chip thermal sensors accessible from secure
world only. So, using thermal noise from these sensors we have tried to
create an entropy source as a pseudo TA.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Acked-by: Joakim Bech <joakim.bech@linaro.org>
jockebech pushed a commit that referenced this pull request May 8, 2020
Size of each JR Output ring entry is of 12 bytes for CAAM
using address pointer size as 64 bit. The descriptor address
pointer thus lies at 32 bit boundary in second output ring entry.
64 bit access of descriptor pointer at 32 bit boundary generates
alignment fault. To fix this,  descriptor address pointer should
be accessed as two 32 bit operations.

 regression_1004 Test User Crypt TA

E/TC:03 00 Core data-abort at address 0xfc09e74c (alignment fault)
E/TC:03 00  esr 0x96000021  ttbr0 0x20000fc0d7060   ttbr1 0x00000000   cidr 0x0
E/TC:03 00  cpu #3          cpsr 0x200001c4
E/TC:03 00  x0  00000000fc09e74c x1  0000000000000000
E/TC:03 00  x2  0000000000000050 x3  0000008000010100
E/TC:03 00  x4  0000000000000003 x5  00000000fc0e46e5
E/TC:03 00  x6  00000000fc09e74c x7  00000000fc09df78
E/TC:03 00  x8  0000000000000078 x9  00000000fc09c110
E/TC:03 00  x10 0000000041001900 x11 00000000ab12a911
E/TC:03 00  x12 0000000032e4d24d x13 00000000fc0e46e5
E/TC:03 00  x14 0000000000000000 x15 0000000000000000
E/TC:03 00  x16 00000000fc0e4b88 x17 0000000000000000
E/TC:03 00  x18 0000000000000000 x19 0000000000000000
E/TC:03 00  x20 000000000000270f x21 00000000fc07c000
E/TC:03 00  x22 00000000fc07c000 x23 0000000000000000
E/TC:03 00  x24 00000000fc09e74c x25 00000000fc0716d0
E/TC:03 00  x26 00000000fc09df78 x27 0000000000000000
E/TC:03 00  x28 0000000000000000 x29 00000000fc0e4900
E/TC:03 00  x30 00000000fc01ae8c elr 00000000fc01c124
E/TC:03 00  sp_el0 00000000fc0e4900
E/TC:03 00 TEE load address @ 0xfc000000
E/TC:03 00 Core data-abort at address 0xfc09e74c .debug_info+649036 (alignment fault)
E/TC:03 00 Call stack:
E/TC:03 00  0x00000000fc01c124 caam_desc_pop at core/drivers/crypto/caam/caam_desc.c:88
E/TC:03 00  0x00000000fc01b2ac caam_jr_enqueue at core/drivers/crypto/caam/caam_jr.c:510
E/TC:03 00  0x00000000fc02247c caam_cipher_block at core/drivers/crypto/caam/cipher/caam_cipher.c:331
E/TC:03 00  0x00000000fc022970 do_update_cipher at core/drivers/crypto/caam/cipher/caam_cipher.c:976
E/TC:03 00  0x00000000fc01a290 cipher_update at core/drivers/crypto/crypto_api/cipher/cipher.c:144
E/TC:03 00  0x00000000fc03562c tee_fs_fek_crypt at core/tee/tee_fs_key_manager.c:118
E/TC:03 00  0x00000000fc033dbc verify_root at core/tee/fs_htree.c:549
E/TC:03 00  0x00000000fc031edc ree_fs_open_primitive at core/tee/tee_ree_fs.c:416
E/TC:03 00  0x00000000fc0345d0 tee_fs_dirfile_open at core/tee/fs_dirfile.c:122
E/TC:03 00  0x00000000fc0321cc open_dirh at core/tee/tee_ree_fs.c:530
E/TC:03 00  0x00000000fc032498 ree_fs_open at core/tee/tee_ree_fs.c:604
E/TC:03 00  0x00000000fc0363dc tadb_open at core/tee/tadb.c:214
E/TC:03 00  0x00000000fc036c44 tee_tadb_ta_open at core/tee/tadb.c:633
E/TC:03 00  0x00000000fc00578c secstor_ta_open at core/arch/arm/kernel/secstor_ta.c:19
E/TC:03 00  0x00000000fc026658 system_open_ta_binary at core/pta/system.c:259
E/TC:03 00  0x00000000fc005e24 pseudo_ta_enter_invoke_cmd at core/arch/arm/kernel/pseudo_ta.c:199
E/TC:03 00  0x00000000fc0250dc tee_ta_invoke_command at core/kernel/tee_ta_manager.c:761
E/TC:03 00  0x00000000fc02b398 syscall_invoke_ta_command at core/tee/tee_svc.c:885
E/TC:03 00  0x00000000fc0123bc tee_svc_do_call at core/arch/arm/tee/arch_svc_a64.S:141
E/TC:03 00  0x00000000fc00811c thread_svc_handler at core/arch/arm/kernel/thread.c:1378
E/TC:03 00  0x00000000fc0039e0 el0_svc at core/arch/arm/kernel/thread_a64.S:639

Signed-off-by: Ruchika Gupta <ruchika.gupta@nxp.com>
Reviewed-by: Sahil Malhotra <sahil.malhotra@nxp.com>
Reviewed-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
jockebech pushed a commit that referenced this pull request Nov 18, 2021
Adds checks in e32_relocate() that sym_tab is assigned a symbol table
before using it.

This fixes coverity scan:
CID 1501826 (#1 of 3): Explicit null dereferenced (FORWARD_NULL)
CID 1501826 (#2 of 3): Explicit null dereferenced (FORWARD_NULL)
CID 1501826 (#3 of 3): Explicit null dereferenced (FORWARD_NULL)

Acked-by: Jerome Forissier <jerome@forissier.org>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
jockebech pushed a commit that referenced this pull request Nov 16, 2023
Use the job ring #3 on i.mx8dxl to avoid resource conflict with other
software stacks.

Signed-off-by: Clement Faure <clement.faure@nxp.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
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