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toothless
toothless PublicMinimal RV32I RISCV core written in SystemVerilog to practise hardware design.
Python
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tum-asic-lab
tum-asic-lab PublicTUM Lab: Integrated Keccak Accelerator with Pulpino Microcontroller, verified functionality and did physical design.
Verilog
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auto-power-profile
auto-power-profile PublicAutomatically enables power profiles depending on the charging status of the Laptop.
Shell
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tum-ei-eda/mlonmcu
tum-ei-eda/mlonmcu PublicTool for the deployment and analysis of TinyML applications on TFLM and MicroTVM backends
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