Completed with Abhijeet Prem and Mahika Godbole Hayden Galante's contributions include the assembly code, modifications to rvfpganexys.sv and Swervolf_core.sv, You can find my principle contributions in SweRVolfSoC/Peripherals where I wrote camera_capture.sv, decoder.sv, and vga.sv. I also helped with debugging and design on imageproc.sv.

ECE 540 final_project-video_ascii_art

The project will consist of adding camera functionality to the RvFPGA by interfacing a digital video camera (OV7670) with the RvFPGA softcore and displaying the output of the camera on a VGA capable display. Additionally, the project allows for the implementation of an “ASCII art” filter over the resulting image. For an example of an “ASCII art” filter, please see the video below, which contains a video of the closing scene of Star Wars with an ASCII filter applied to the film.

Star Wars ASCII Scene

Please note that our project will display the filter over data received in real time from the OV7670 and not archival Star Wars footage.

General Instructions:

Please dont commit to the main branch

• The main branch is the current up to date branch. clone this to test our project
• clone the repo and create your personal branch
• Create pull requests, we can review the chages and then commit to the main.
• Do your active development in your own sub branches if possible

How to recreate the project:

• All the source files you need are in the 'src'
• clone the repo
• change the wroking directory to your preferread loaction where you wnat to create and save the project files
• run the TCL script provide in vivado 2019.2
  • there are some IP dependency issues, use the 2019.2 for bringing up the project without much issues.