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add instruction
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hidva committed Nov 14, 2022
1 parent 3d31554 commit 6dbba3e
Showing 1 changed file with 46 additions and 0 deletions.
46 changes: 46 additions & 0 deletions src/x86asm.lalrpop
Original file line number Diff line number Diff line change
Expand Up @@ -373,6 +373,12 @@ INST_MNEM: &'static str = {
"addss" => "addss",
"addsubpd" => "addsubpd",
"addsubps" => "addsubps",
"vaddpd" => "vaddpd",
"vaddps" => "vaddps",
"vaddsd" => "vaddsd",
"vaddss" => "vaddss",
"vaddsubpd" => "vaddsubpd",
"vaddsubps" => "vaddsubps",
"adox" => "adox",
"aesdec" => "aesdec",
"aesdeclast" => "aesdeclast",
Expand Down Expand Up @@ -494,6 +500,28 @@ INST_MNEM: &'static str = {
"cvttps2pi" => "cvttps2pi",
"cvttsd2si" => "cvttsd2si",
"cvttss2si" => "cvttss2si",
"vcvtdq2pd" => "vcvtdq2pd",
"vcvtdq2ps" => "vcvtdq2ps",
"vcvtpd2dq" => "vcvtpd2dq",
"vcvtpd2pi" => "vcvtpd2pi",
"vcvtpd2ps" => "vcvtpd2ps",
"vcvtpi2pd" => "vcvtpi2pd",
"vcvtpi2ps" => "vcvtpi2ps",
"vcvtps2dq" => "vcvtps2dq",
"vcvtps2pd" => "vcvtps2pd",
"vcvtps2pi" => "vcvtps2pi",
"vcvtsd2si" => "vcvtsd2si",
"vcvtsd2ss" => "vcvtsd2ss",
"vcvtsi2sd" => "vcvtsi2sd",
"vcvtsi2ss" => "vcvtsi2ss",
"vcvtss2sd" => "vcvtss2sd",
"vcvtss2si" => "vcvtss2si",
"vcvttpd2dq" => "vcvttpd2dq",
"vcvttpd2pi" => "vcvttpd2pi",
"vcvttps2dq" => "vcvttps2dq",
"vcvttps2pi" => "vcvttps2pi",
"vcvttsd2si" => "vcvttsd2si",
"vcvttss2si" => "vcvttss2si",
"cwd" => "cwd",
"cwde" => "cwde",
"daa" => "daa",
Expand All @@ -506,6 +534,12 @@ INST_MNEM: &'static str = {
"divss" => "divss",
"dppd" => "dppd",
"dpps" => "dpps",
"vdivpd" => "vdivpd",
"vdivps" => "vdivps",
"vdivsd" => "vdivsd",
"vdivss" => "vdivss",
"vdppd" => "vdppd",
"vdpps" => "vdpps",
"emms" => "emms",
"encls" => "encls",
"enclu" => "enclu",
Expand Down Expand Up @@ -764,6 +798,7 @@ INST_MNEM: &'static str = {
"mov" => "mov",
"movabs" => "movabs",
"movapd" => "movapd",
"vmovapd" => "vmovapd",
"movaps" => "movaps",
"vmovaps" => "vmovaps",
"movbe" => "movbe",
Expand Down Expand Up @@ -811,6 +846,10 @@ INST_MNEM: &'static str = {
"mulps" => "mulps",
"mulsd" => "mulsd",
"mulss" => "mulss",
"vmulpd" => "vmulpd",
"vmulps" => "vmulps",
"vmulsd" => "vmulsd",
"vmulss" => "vmulss",
"mulx" => "mulx",
"mwait" => "mwait",
"neg" => "neg",
Expand Down Expand Up @@ -1070,9 +1109,13 @@ INST_MNEM: &'static str = {
"str" => "str",
"sub" => "sub",
"subpd" => "subpd",
"vsubpd" => "vsubpd",
"subps" => "subps",
"vsubps" => "vsubps",
"subsd" => "subsd",
"vsubsd" => "vsubsd",
"subss" => "subss",
"vsubss" => "vsubss",
"swapgs" => "swapgs",
"syscall" => "syscall",
"sysenter" => "sysenter",
Expand All @@ -1083,6 +1126,8 @@ INST_MNEM: &'static str = {
"tzcnt" => "tzcnt",
"ucomisd" => "ucomisd",
"ucomiss" => "ucomiss",
"vucomisd" => "vucomisd",
"vucomiss" => "vucomiss",
"ud" => "ud",
"umonitor" => "umonitor",
"umwait" => "umwait",
Expand Down Expand Up @@ -1445,6 +1490,7 @@ INST_MNEM: &'static str = {
"xlatb" => "xlatb",
"xor" => "xor",
"xorpd" => "xorpd",
"vxorpd" => "vxorpd",
"xorps" => "xorps",
"vxorps" => "vxorps",
"xrelease" => "xrelease",
Expand Down

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