Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Implement PRELU as a binary operator instead of a one-off operator type #7034

Merged
merged 1 commit into from
Oct 21, 2024
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
1 change: 0 additions & 1 deletion BUILD.bazel
Original file line number Diff line number Diff line change
Expand Up @@ -233,7 +233,6 @@ MICROKERNEL_HDRS = [
"src/xnnpack/pad.h",
"src/xnnpack/pavgpool.h",
"src/xnnpack/ppmm.h",
"src/xnnpack/prelu.h",
"src/xnnpack/quantization.h",
"src/xnnpack/raddexpminusmax.h",
"src/xnnpack/raddextexp.h",
Expand Down
7 changes: 0 additions & 7 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -418,7 +418,6 @@ SET(OPERATOR_SRCS
src/operators/global-average-pooling-nwc.c
src/operators/lut-elementwise-nc.c
src/operators/max-pooling-nhwc.c
src/operators/prelu-nc.c
src/operators/reduce-nd.c
src/operators/resize-bilinear-nchw.c
src/operators/resize-bilinear-nhwc.c
Expand Down Expand Up @@ -464,7 +463,6 @@ SET(SUBGRAPH_SRCS
src/subgraph/log.c
src/subgraph/max-pooling-2d.c
src/subgraph/negate.c
src/subgraph/prelu.c
src/subgraph/reciprocal-square-root.c
src/subgraph/reshape-helpers.c
src/subgraph/scaled-dot-product-attention.c
Expand Down Expand Up @@ -508,7 +506,6 @@ SET(XNNPACK_SRCS
src/configs/lut32norm-config.c
src/configs/maxpool-config.c
src/configs/pavgpool-config.c
src/configs/prelu-config.c
src/configs/raddstoreexpminusmax-config.c
src/configs/reduce-config.c
src/configs/rmax-config.c
Expand Down Expand Up @@ -1399,7 +1396,6 @@ IF(XNNPACK_BUILD_TESTS)
log
max-pooling-2d
negate
prelu
reciprocal-square-root
reshape-helpers
sigmoid
Expand Down Expand Up @@ -1470,7 +1466,6 @@ IF(XNNPACK_BUILD_TESTS)
f16-gavgpool-minmax
f16-ibilinear-chw
f16-ibilinear
f16-prelu
f16-raddstoreexpminusmax
f16-rmax
f16-rsum
Expand All @@ -1483,7 +1478,6 @@ IF(XNNPACK_BUILD_TESTS)
f32-gavgpool-minmax
f32-ibilinear-chw
f32-ibilinear
f32-prelu
f32-raddexpminusmax
f32-raddextexp
f32-raddstoreexpminusmax
Expand Down Expand Up @@ -1946,7 +1940,6 @@ IF(XNNPACK_BUILD_BENCHMARKS)
leaky-relu
max-pooling
negate
prelu
reciprocal-square-root
sigmoid
softmax
Expand Down
26 changes: 13 additions & 13 deletions bench/prelu.cc
Original file line number Diff line number Diff line change
Expand Up @@ -7,13 +7,13 @@
#include <cfloat>
#include <cmath>
#include <functional>
#include <limits>
#include <memory>
#include <random>
#include <vector>

#include "xnnpack.h"

#include "bench/utils.h"
#include "xnnpack.h"
#include "xnnpack/buffer.h"
#include <benchmark/benchmark.h>
#ifdef BENCHMARK_TENSORFLOW_LITE
Expand Down Expand Up @@ -43,34 +43,34 @@ void xnnpack_prelu_f32(benchmark::State& state, const char* net) {
std::generate(slope.begin(), slope.end(), std::ref(f32wrng));
xnnpack::Buffer<float> output(batch_size * height * width * channels);

const size_t input_shape[4] = {batch_size, height, width, channels};
const size_t slope_shape[1] = {channels};

xnn_status status = xnn_initialize(nullptr /* allocator */);
if (status != xnn_status_success) {
state.SkipWithError("failed to initialize XNNPACK");
return;
}

xnn_operator_t prelu_op = nullptr;
status = xnn_create_prelu_nc_f32(
channels, /*slope_channels=*/channels, /*input_stride=*/channels , /*output_stride=*/channels,
slope.data(),
0 /* flags */, nullptr, nullptr, &prelu_op);
status = xnn_create_binary_elementwise_nd(xnn_binary_prelu, xnn_datatype_fp32,
nullptr, nullptr, nullptr,
/*flags=*/0, &prelu_op);
if (status != xnn_status_success) {
state.SkipWithError("failed to create FP32 PReLU operator");
return;
}

status = xnn_reshape_prelu_nc_f32(
prelu_op,
batch_size * height * width,
/*threadpool=*/nullptr);
status = xnn_reshape_binary_elementwise_nd(prelu_op, 4, &input_shape[0], 1,
&slope_shape[0],
/*threadpool=*/nullptr);
if (status != xnn_status_success) {
state.SkipWithError("failed to reshape FP32 PReLU operator");
return;
}

status = xnn_setup_prelu_nc_f32(
prelu_op,
input.data(), output.data());
status = xnn_setup_binary_elementwise_nd(prelu_op, input.data(), slope.data(),
output.data());
if (status != xnn_status_success) {
state.SkipWithError("failed to setup FP32 PReLU operator");
return;
Expand Down
3 changes: 0 additions & 3 deletions build_srcs.bzl
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,6 @@ OPERATOR_SRCS = [
"src/operators/global-average-pooling-nwc.c",
"src/operators/lut-elementwise-nc.c",
"src/operators/max-pooling-nhwc.c",
"src/operators/prelu-nc.c",
"src/operators/reduce-nd.c",
"src/operators/resize-bilinear-nchw.c",
"src/operators/resize-bilinear-nhwc.c",
Expand Down Expand Up @@ -71,7 +70,6 @@ SUBGRAPH_SRCS = [
"src/subgraph/log.c",
"src/subgraph/max-pooling-2d.c",
"src/subgraph/negate.c",
"src/subgraph/prelu.c",
"src/subgraph/reciprocal-square-root.c",
"src/subgraph/reshape-helpers.c",
"src/subgraph/rope.c",
Expand Down Expand Up @@ -120,7 +118,6 @@ XNNPACK_SRCS = [
"src/configs/lut32norm-config.c",
"src/configs/maxpool-config.c",
"src/configs/pavgpool-config.c",
"src/configs/prelu-config.c",
"src/configs/raddstoreexpminusmax-config.c",
"src/configs/reduce-config.c",
"src/configs/rmax-config.c",
Expand Down
8 changes: 3 additions & 5 deletions cmake/gen/avx512f_microkernels.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,6 @@ SET(PROD_AVX512F_MICROKERNEL_SRCS
src/f32-gemm/gen/f32-gemm-7x16-minmax-avx512f-broadcast.c
src/f32-igemm/gen/f32-igemm-1x16-minmax-avx512f-broadcast.c
src/f32-igemm/gen/f32-igemm-7x16-minmax-avx512f-broadcast.c
src/f32-prelu/gen/f32-prelu-avx512f-2x16.c
src/f32-raddstoreexpminusmax/gen/f32-raddstoreexpminusmax-avx512f-rr2-p5-u64-acc2.c
src/f32-rdsum/gen/f32-rdsum-7p7x-minmax-avx512f-c64.c
src/f32-rminmax/gen/f32-rmax-avx512f-u64-acc4.c
Expand All @@ -35,7 +34,10 @@ SET(PROD_AVX512F_MICROKERNEL_SRCS
src/f32-vbinary/gen/f32-vminc-avx512f-u32.c
src/f32-vbinary/gen/f32-vmul-avx512f-u32.c
src/f32-vbinary/gen/f32-vmulc-avx512f-u32.c
src/f32-vbinary/gen/f32-vprelu-avx512f-u32.c
src/f32-vbinary/gen/f32-vpreluc-avx512f-u32.c
src/f32-vbinary/gen/f32-vrdivc-avx512f-u32.c
src/f32-vbinary/gen/f32-vrpreluc-avx512f-u32.c
src/f32-vbinary/gen/f32-vrsubc-avx512f-u32.c
src/f32-vbinary/gen/f32-vsqrdiff-avx512f-u32.c
src/f32-vbinary/gen/f32-vsqrdiffc-avx512f-u32.c
Expand Down Expand Up @@ -98,7 +100,6 @@ SET(NON_PROD_AVX512F_MICROKERNEL_SRCS
src/f32-igemm/gen/f32-igemm-5x16-minmax-avx512f-broadcast.c
src/f32-igemm/gen/f32-igemm-6x16-minmax-avx512f-broadcast.c
src/f32-igemm/gen/f32-igemm-8x16-minmax-avx512f-broadcast.c
src/f32-prelu/gen/f32-prelu-avx512f-2x32.c
src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx512f-p5-scalef-u64-acc2.c
src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx512f-p5-scalef-u64-acc4.c
src/f32-raddexpminusmax/gen/f32-raddexpminusmax-avx512f-p5-scalef-u64.c
Expand Down Expand Up @@ -167,12 +168,9 @@ SET(NON_PROD_AVX512F_MICROKERNEL_SRCS
src/f32-vbinary/gen/f32-vmul-avx512f-u16.c
src/f32-vbinary/gen/f32-vmulc-avx512f-u16.c
src/f32-vbinary/gen/f32-vprelu-avx512f-u16.c
src/f32-vbinary/gen/f32-vprelu-avx512f-u32.c
src/f32-vbinary/gen/f32-vpreluc-avx512f-u16.c
src/f32-vbinary/gen/f32-vpreluc-avx512f-u32.c
src/f32-vbinary/gen/f32-vrdivc-avx512f-u16.c
src/f32-vbinary/gen/f32-vrpreluc-avx512f-u16.c
src/f32-vbinary/gen/f32-vrpreluc-avx512f-u32.c
src/f32-vbinary/gen/f32-vrsubc-avx512f-u16.c
src/f32-vbinary/gen/f32-vsqrdiff-avx512f-u16.c
src/f32-vbinary/gen/f32-vsqrdiffc-avx512f-u16.c
Expand Down
6 changes: 3 additions & 3 deletions cmake/gen/avx512fp16_microkernels.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,10 @@ SET(PROD_AVX512FP16_MICROKERNEL_SRCS
src/f16-vbinary/gen/f16-vminc-avx512fp16-u64.c
src/f16-vbinary/gen/f16-vmul-avx512fp16-u64.c
src/f16-vbinary/gen/f16-vmulc-avx512fp16-u64.c
src/f16-vbinary/gen/f16-vprelu-avx512fp16-u64.c
src/f16-vbinary/gen/f16-vpreluc-avx512fp16-u64.c
src/f16-vbinary/gen/f16-vrdivc-avx512fp16-u64.c
src/f16-vbinary/gen/f16-vrpreluc-avx512fp16-u64.c
src/f16-vbinary/gen/f16-vrsubc-avx512fp16-u64.c
src/f16-vbinary/gen/f16-vsqrdiff-avx512fp16-u64.c
src/f16-vbinary/gen/f16-vsqrdiffc-avx512fp16-u64.c
Expand Down Expand Up @@ -83,12 +86,9 @@ SET(NON_PROD_AVX512FP16_MICROKERNEL_SRCS
src/f16-vbinary/gen/f16-vmul-avx512fp16-u32.c
src/f16-vbinary/gen/f16-vmulc-avx512fp16-u32.c
src/f16-vbinary/gen/f16-vprelu-avx512fp16-u32.c
src/f16-vbinary/gen/f16-vprelu-avx512fp16-u64.c
src/f16-vbinary/gen/f16-vpreluc-avx512fp16-u32.c
src/f16-vbinary/gen/f16-vpreluc-avx512fp16-u64.c
src/f16-vbinary/gen/f16-vrdivc-avx512fp16-u32.c
src/f16-vbinary/gen/f16-vrpreluc-avx512fp16-u32.c
src/f16-vbinary/gen/f16-vrpreluc-avx512fp16-u64.c
src/f16-vbinary/gen/f16-vrsubc-avx512fp16-u32.c
src/f16-vbinary/gen/f16-vsqrdiff-avx512fp16-u32.c
src/f16-vbinary/gen/f16-vsqrdiffc-avx512fp16-u32.c
Expand Down
9 changes: 4 additions & 5 deletions cmake/gen/avx_microkernels.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,6 @@ SET(PROD_AVX_MICROKERNEL_SRCS
src/f32-gemm/gen/f32-gemm-5x16-minmax-avx-broadcast.c
src/f32-igemm/gen/f32-igemm-1x16-minmax-avx-broadcast.c
src/f32-igemm/gen/f32-igemm-5x16-minmax-avx-broadcast.c
src/f32-prelu/gen/f32-prelu-avx-2x16.c
src/f32-qc4w-gemm/gen/f32-qc4w-gemm-1x16-minmax-avx-broadcast.c
src/f32-qc4w-gemm/gen/f32-qc4w-gemm-3x16-minmax-avx-broadcast.c
src/f32-qc8w-gemm/gen/f32-qc8w-gemm-1x16-minmax-avx-broadcast.c
Expand All @@ -42,7 +41,10 @@ SET(PROD_AVX_MICROKERNEL_SRCS
src/f32-vbinary/gen/f32-vminc-avx-u16.c
src/f32-vbinary/gen/f32-vmul-avx-u16.c
src/f32-vbinary/gen/f32-vmulc-avx-u16.c
src/f32-vbinary/gen/f32-vprelu-avx-u16.c
src/f32-vbinary/gen/f32-vpreluc-avx-u16.c
src/f32-vbinary/gen/f32-vrdivc-avx-u16.c
src/f32-vbinary/gen/f32-vrpreluc-avx-u16.c
src/f32-vbinary/gen/f32-vrsubc-avx-u16.c
src/f32-vbinary/gen/f32-vsqrdiff-avx-u16.c
src/f32-vbinary/gen/f32-vsqrdiffc-avx-u16.c
Expand Down Expand Up @@ -165,7 +167,7 @@ SET(NON_PROD_AVX_MICROKERNEL_SRCS
src/f32-igemm/gen/f32-igemm-6x8-minmax-avx-broadcast.c
src/f32-igemm/gen/f32-igemm-6x16-minmax-avx-broadcast.c
src/f32-igemm/gen/f32-igemm-7x8-minmax-avx-broadcast.c
src/f32-prelu/gen/f32-prelu-avx-2x8.c
src/f32-prelu/gen/f32-prelu-avx-2x16.c
src/f32-qc4w-gemm/gen/f32-qc4w-gemm-2x16-minmax-avx-broadcast.c
src/f32-qc4w-gemm/gen/f32-qc4w-gemm-4x16-minmax-avx-broadcast.c
src/f32-qc4w-gemm/gen/f32-qc4w-gemm-5x16-minmax-avx-broadcast.c
Expand Down Expand Up @@ -214,12 +216,9 @@ SET(NON_PROD_AVX_MICROKERNEL_SRCS
src/f32-vbinary/gen/f32-vmul-avx-u8.c
src/f32-vbinary/gen/f32-vmulc-avx-u8.c
src/f32-vbinary/gen/f32-vprelu-avx-u8.c
src/f32-vbinary/gen/f32-vprelu-avx-u16.c
src/f32-vbinary/gen/f32-vpreluc-avx-u8.c
src/f32-vbinary/gen/f32-vpreluc-avx-u16.c
src/f32-vbinary/gen/f32-vrdivc-avx-u8.c
src/f32-vbinary/gen/f32-vrpreluc-avx-u8.c
src/f32-vbinary/gen/f32-vrpreluc-avx-u16.c
src/f32-vbinary/gen/f32-vrsubc-avx-u8.c
src/f32-vbinary/gen/f32-vsqrdiff-avx-u8.c
src/f32-vbinary/gen/f32-vsqrdiffc-avx-u8.c
Expand Down
8 changes: 3 additions & 5 deletions cmake/gen/f16c_microkernels.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -18,7 +18,6 @@ SET(PROD_F16C_MICROKERNEL_SRCS
src/f16-gavgpool/gen/f16-gavgpool-7p7x-minmax-f16c-c8.c
src/f16-gavgpool/gen/f16-gavgpool-7x-minmax-f16c-c8.c
src/f16-maxpool/f16-maxpool-9p8x-minmax-f16c-c8.c
src/f16-prelu/gen/f16-prelu-f16c-2x16.c
src/f16-rminmax/f16-rmax-f16c-u32.c
src/f16-vbinary/gen/f16-vadd-f16c-u16.c
src/f16-vbinary/gen/f16-vaddc-f16c-u16.c
Expand All @@ -30,7 +29,10 @@ SET(PROD_F16C_MICROKERNEL_SRCS
src/f16-vbinary/gen/f16-vminc-f16c-u16.c
src/f16-vbinary/gen/f16-vmul-f16c-u16.c
src/f16-vbinary/gen/f16-vmulc-f16c-u16.c
src/f16-vbinary/gen/f16-vprelu-f16c-u16.c
src/f16-vbinary/gen/f16-vpreluc-f16c-u16.c
src/f16-vbinary/gen/f16-vrdivc-f16c-u8.c
src/f16-vbinary/gen/f16-vrpreluc-f16c-u16.c
src/f16-vbinary/gen/f16-vrsubc-f16c-u16.c
src/f16-vbinary/gen/f16-vsqrdiff-f16c-u16.c
src/f16-vbinary/gen/f16-vsqrdiffc-f16c-u16.c
Expand Down Expand Up @@ -64,7 +66,6 @@ SET(NON_PROD_F16C_MICROKERNEL_SRCS
src/f16-gavgpool/gen/f16-gavgpool-7x-minmax-f16c-c16.c
src/f16-gavgpool/gen/f16-gavgpool-7x-minmax-f16c-c24.c
src/f16-gavgpool/gen/f16-gavgpool-7x-minmax-f16c-c32.c
src/f16-prelu/gen/f16-prelu-f16c-2x8.c
src/f16-vbinary/gen/f16-vadd-f16c-u8.c
src/f16-vbinary/gen/f16-vaddc-f16c-u8.c
src/f16-vbinary/gen/f16-vdiv-f16c-u16.c
Expand All @@ -76,12 +77,9 @@ SET(NON_PROD_F16C_MICROKERNEL_SRCS
src/f16-vbinary/gen/f16-vmul-f16c-u8.c
src/f16-vbinary/gen/f16-vmulc-f16c-u8.c
src/f16-vbinary/gen/f16-vprelu-f16c-u8.c
src/f16-vbinary/gen/f16-vprelu-f16c-u16.c
src/f16-vbinary/gen/f16-vpreluc-f16c-u8.c
src/f16-vbinary/gen/f16-vpreluc-f16c-u16.c
src/f16-vbinary/gen/f16-vrdivc-f16c-u16.c
src/f16-vbinary/gen/f16-vrpreluc-f16c-u8.c
src/f16-vbinary/gen/f16-vrpreluc-f16c-u16.c
src/f16-vbinary/gen/f16-vrsubc-f16c-u8.c
src/f16-vbinary/gen/f16-vsqrdiff-f16c-u8.c
src/f16-vbinary/gen/f16-vsqrdiffc-f16c-u8.c
Expand Down
15 changes: 3 additions & 12 deletions cmake/gen/neon_microkernels.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -41,7 +41,6 @@ SET(PROD_NEON_MICROKERNEL_SRCS
src/f32-maxpool/f32-maxpool-9p8x-minmax-neon-c4.c
src/f32-pavgpool/f32-pavgpool-9p8x-minmax-neon-c4.c
src/f32-pavgpool/f32-pavgpool-9x-minmax-neon-c4.c
src/f32-prelu/gen/f32-prelu-neon-2x8.c
src/f32-qc4w-gemm/gen/f32-qc4w-gemm-1x8-minmax-neon-lane-ld64.c
src/f32-qc4w-gemm/gen/f32-qc4w-gemm-4x8-minmax-neon-lane-ld64.c
src/f32-qc8w-gemm/gen/f32-qc8w-gemm-1x8-minmax-neon-lane-ld64.c
Expand All @@ -61,6 +60,9 @@ SET(PROD_NEON_MICROKERNEL_SRCS
src/f32-vbinary/gen/f32-vminc-neon-u8.c
src/f32-vbinary/gen/f32-vmul-neon-u8.c
src/f32-vbinary/gen/f32-vmulc-neon-u8.c
src/f32-vbinary/gen/f32-vprelu-neon-u8.c
src/f32-vbinary/gen/f32-vpreluc-neon-u8.c
src/f32-vbinary/gen/f32-vrpreluc-neon-u8.c
src/f32-vbinary/gen/f32-vrsubc-neon-u8.c
src/f32-vbinary/gen/f32-vsqrdiff-neon-u8.c
src/f32-vbinary/gen/f32-vsqrdiffc-neon-u8.c
Expand Down Expand Up @@ -335,14 +337,6 @@ SET(NON_PROD_NEON_MICROKERNEL_SRCS
src/f32-ppmm/gen/f32-ppmm-4x16-minmax-neon.c
src/f32-ppmm/gen/f32-ppmm-8x8-minmax-neon-prfm.c
src/f32-ppmm/gen/f32-ppmm-8x8-minmax-neon.c
src/f32-prelu/gen/f32-prelu-neon-1x4.c
src/f32-prelu/gen/f32-prelu-neon-1x8.c
src/f32-prelu/gen/f32-prelu-neon-1x16.c
src/f32-prelu/gen/f32-prelu-neon-2x4.c
src/f32-prelu/gen/f32-prelu-neon-2x16.c
src/f32-prelu/gen/f32-prelu-neon-4x4.c
src/f32-prelu/gen/f32-prelu-neon-4x8.c
src/f32-prelu/gen/f32-prelu-neon-4x16.c
src/f32-qc4w-gemm/gen/f32-qc4w-gemm-1x8-minmax-neon-dup-ld64.c
src/f32-qc4w-gemm/gen/f32-qc4w-gemm-4x8-minmax-neon-dup-ld64.c
src/f32-qc4w-gemm/gen/f32-qc4w-gemm-5x8-minmax-neon-lane-ld64.c
Expand Down Expand Up @@ -409,11 +403,8 @@ SET(NON_PROD_NEON_MICROKERNEL_SRCS
src/f32-vbinary/gen/f32-vmul-neon-u4.c
src/f32-vbinary/gen/f32-vmulc-neon-u4.c
src/f32-vbinary/gen/f32-vprelu-neon-u4.c
src/f32-vbinary/gen/f32-vprelu-neon-u8.c
src/f32-vbinary/gen/f32-vpreluc-neon-u4.c
src/f32-vbinary/gen/f32-vpreluc-neon-u8.c
src/f32-vbinary/gen/f32-vrpreluc-neon-u4.c
src/f32-vbinary/gen/f32-vrpreluc-neon-u8.c
src/f32-vbinary/gen/f32-vrsubc-neon-u4.c
src/f32-vbinary/gen/f32-vsqrdiff-neon-u4.c
src/f32-vbinary/gen/f32-vsqrdiffc-neon-u4.c
Expand Down
8 changes: 3 additions & 5 deletions cmake/gen/neonfp16arith_microkernels.cmake
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,6 @@ SET(PROD_NEONFP16ARITH_MICROKERNEL_SRCS
src/f16-maxpool/f16-maxpool-9p8x-minmax-neonfp16arith-c8.c
src/f16-pavgpool/f16-pavgpool-9p8x-minmax-neonfp16arith-c8.c
src/f16-pavgpool/f16-pavgpool-9x-minmax-neonfp16arith-c8.c
src/f16-prelu/gen/f16-prelu-neonfp16arith-2x16.c
src/f16-qs8-vcvt/gen/f16-qs8-vcvt-neonfp16arith-u32.c
src/f16-raddstoreexpminusmax/gen/f16-raddstoreexpminusmax-neonfp16arith-rr2-p2-u32.c
src/f16-rminmax/gen/f16-rmax-neonfp16arith-u32-acc4.c
Expand All @@ -54,6 +53,9 @@ SET(PROD_NEONFP16ARITH_MICROKERNEL_SRCS
src/f16-vbinary/gen/f16-vminc-neonfp16arith-u16.c
src/f16-vbinary/gen/f16-vmul-neonfp16arith-u16.c
src/f16-vbinary/gen/f16-vmulc-neonfp16arith-u16.c
src/f16-vbinary/gen/f16-vprelu-neonfp16arith-u16.c
src/f16-vbinary/gen/f16-vpreluc-neonfp16arith-u16.c
src/f16-vbinary/gen/f16-vrpreluc-neonfp16arith-u16.c
src/f16-vbinary/gen/f16-vrsubc-neonfp16arith-u16.c
src/f16-vbinary/gen/f16-vsqrdiff-neonfp16arith-u16.c
src/f16-vbinary/gen/f16-vsqrdiffc-neonfp16arith-u16.c
Expand Down Expand Up @@ -194,7 +196,6 @@ SET(NON_PROD_NEONFP16ARITH_MICROKERNEL_SRCS
src/f16-igemm/gen/f16-igemm-4x16-minmax-neonfp16arith-ld64.c
src/f16-igemm/gen/f16-igemm-8x8-minmax-neonfp16arith-ld64.c
src/f16-igemm/gen/f16-igemm-8x16-minmax-neonfp16arith-ld64.c
src/f16-prelu/gen/f16-prelu-neonfp16arith-2x8.c
src/f16-qs8-vcvt/gen/f16-qs8-vcvt-neonfp16arith-u8.c
src/f16-qs8-vcvt/gen/f16-qs8-vcvt-neonfp16arith-u16.c
src/f16-qs8-vcvt/gen/f16-qs8-vcvt-neonfp16arith-u24.c
Expand Down Expand Up @@ -271,11 +272,8 @@ SET(NON_PROD_NEONFP16ARITH_MICROKERNEL_SRCS
src/f16-vbinary/gen/f16-vmul-neonfp16arith-u8.c
src/f16-vbinary/gen/f16-vmulc-neonfp16arith-u8.c
src/f16-vbinary/gen/f16-vprelu-neonfp16arith-u8.c
src/f16-vbinary/gen/f16-vprelu-neonfp16arith-u16.c
src/f16-vbinary/gen/f16-vpreluc-neonfp16arith-u8.c
src/f16-vbinary/gen/f16-vpreluc-neonfp16arith-u16.c
src/f16-vbinary/gen/f16-vrpreluc-neonfp16arith-u8.c
src/f16-vbinary/gen/f16-vrpreluc-neonfp16arith-u16.c
src/f16-vbinary/gen/f16-vrsubc-neonfp16arith-u8.c
src/f16-vbinary/gen/f16-vsqrdiff-neonfp16arith-u8.c
src/f16-vbinary/gen/f16-vsqrdiffc-neonfp16arith-u8.c
Expand Down
Loading
Loading