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An algorithmic state machine that computes the lowest common multiple of two 8-bit numbers. Implemented on a Xilinx FPGA.

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georgantas/fpga-lowest-common-multiple-calculator

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Synthesized Circuit

Circuit synthesized with Xilinx ISE.

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Tests

Inputs are stored in the "mick" and "keith" registers. Output is displayed on the "lcm" line when "done" is enabled.

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An algorithmic state machine that computes the lowest common multiple of two 8-bit numbers. Implemented on a Xilinx FPGA.

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