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fix(sdmmc): Fix iomux pin initialization #11998
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Memory usage test (comparing PR against master branch)The table below shows the summary of memory usage change (decrease - increase) in bytes and percentage for each target.
Click to expand the detailed deltas report [usage change in BYTES]
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SuGlider
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LGTM
Test Results 76 files 76 suites 16m 38s ⏱️ Results for commit 4868262. ♻️ This comment has been updated with latest results. |
| .d5 = GPIO_NUM_0, | ||
| .d6 = GPIO_NUM_0, | ||
| .d7 = GPIO_NUM_0, | ||
| .cd = SDMMC_SLOT_NO_CD, |
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I suggest you report this to IDF team, as it seems this is not the proper way things should be. There is no reason why IO0 can't be used
Description of Change
This pull request updates the SDMMC slot configuration for ESP32P4 boards to improve compatibility with ESP-IDF's pin checking logic. Instead of using
GPIO_NUM_NC(-1), the code now sets all SDMMC pins toGPIO_NUM_0(0), which works correctly with the ESP-IDF'ss_check_pin_not_set()function.Hardware compatibility fix:
SD_MMC.cpp, the SDMMC slot configuration for ESP32P4 boards now sets all pins (clk,cmd,d0–d7) toGPIO_NUM_0instead ofGPIO_NUM_NC, ensuring proper operation with ESP-IDF's pin validation logic.Test Scenarios
Tested using P4 and SDMMC example.
Related links
Closes #11995