[mipi_dsi] Document DMA2D async flush options#6747
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Please take a look at the requested changes, and use the Ready for review button when you are done, thanks 👍 |
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Caution Review failedFailed to post review comments WalkthroughThis PR updates many documentation pages and site metadata: a version bump, new Router speaker docs, new MIPI DSI options, numerous component documentation clarifications/additions, and CLI/security guide updates. ChangesDocumentation updates (site-wide)
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There was a problem hiding this comment.
As this is a feature matched with a PR in https://github.com/esphome/esphome, please target your PR to the next branch and rebase.
Base branch has been corrected - dismissing previous review.
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I opened esphome/esphome#16873 as the shared architecture/performance discussion for the ESP32-P4 LVGL/MIPI DSI PR stack. It includes how the MIPI DSI docs fit into the async flush, DMA2D, zero-copy/cache-sync, PPA, and LVGL 9.5 work, plus downstream benchmark numbers. For cross-PR design questions it is probably easier to discuss there and keep this docs PR focused on documenting the scoped options. |
Description
Documents the
use_dma2dandasync_lvgl_flushoptions added by esphome/esphome#16853.Related pull request