move embedded hal impl to version modules to allow for 10bit addr on v2

embassy-rs · Jun 18, 2024 · 8df4692 · 8df4692
1 parent 9aeadee
commit 8df4692
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diff --git a/embassy-stm32/src/i2c/mod.rs b/embassy-stm32/src/i2c/mod.rs
@@ -388,42 +388,6 @@ foreach_peripheral!(
     };
 );
 
-impl<'d, M: Mode, IM: MasterMode, A: embedded_hal_02::blocking::i2c::AddressMode>
-    embedded_hal_02::blocking::i2c::Read<A> for I2c<'d, M, IM>
-where
-    A: Into<Address>,
-{
-    type Error = Error;
-
-    fn read(&mut self, address: A, buffer: &mut [u8]) -> Result<(), Self::Error> {
-        self.blocking_read(address.into(), buffer)
-    }
-}
-
-impl<'d, M: Mode, IM: MasterMode, A: embedded_hal_02::blocking::i2c::AddressMode>
-    embedded_hal_02::blocking::i2c::Write<A> for I2c<'d, M, IM>
-where
-    A: Into<Address>,
-{
-    type Error = Error;
-
-    fn write(&mut self, address: A, write: &[u8]) -> Result<(), Self::Error> {
-        self.blocking_write(address.into(), write)
-    }
-}
-
-impl<'d, M: Mode, IM: MasterMode, A: embedded_hal_02::blocking::i2c::AddressMode>
-    embedded_hal_02::blocking::i2c::WriteRead<A> for I2c<'d, M, IM>
-where
-    A: Into<Address>,
-{
-    type Error = Error;
-
-    fn write_read(&mut self, address: A, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
-        self.blocking_write_read(address.into(), write, read)
-    }
-}
-
 impl embedded_hal_1::i2c::Error for Error {
     fn kind(&self) -> embedded_hal_1::i2c::ErrorKind {
         match *self {
@@ -444,56 +408,6 @@ impl<'d, M: Mode, IM: MasterMode> embedded_hal_1::i2c::ErrorType for I2c<'d, M,
     type Error = Error;
 }
 
-impl<'d, M: Mode, IM: MasterMode, A: embedded_hal_1::i2c::AddressMode> embedded_hal_1::i2c::I2c<A> for I2c<'d, M, IM>
-where
-    Address: From<A>,
-{
-    fn read(&mut self, address: A, read: &mut [u8]) -> Result<(), Self::Error> {
-        self.blocking_read(address.into(), read)
-    }
-
-    fn write(&mut self, address: A, write: &[u8]) -> Result<(), Self::Error> {
-        self.blocking_write(address.into(), write)
-    }
-
-    fn write_read(&mut self, address: A, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
-        self.blocking_write_read(address.into(), write, read)
-    }
-
-    fn transaction(
-        &mut self,
-        address: A,
-        operations: &mut [embedded_hal_1::i2c::Operation<'_>],
-    ) -> Result<(), Self::Error> {
-        self.blocking_transaction(address.into(), operations)
-    }
-}
-
-impl<'d, IM: MasterMode, A: embedded_hal_async::i2c::AddressMode> embedded_hal_async::i2c::I2c<A> for I2c<'d, Async, IM>
-where
-    Address: From<A>,
-{
-    async fn read(&mut self, address: A, read: &mut [u8]) -> Result<(), Self::Error> {
-        self.read(address.into(), read).await
-    }
-
-    async fn write(&mut self, address: A, write: &[u8]) -> Result<(), Self::Error> {
-        self.write(address.into(), write).await
-    }
-
-    async fn write_read(&mut self, address: A, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
-        self.write_read(address.into(), write, read).await
-    }
-
-    async fn transaction(
-        &mut self,
-        address: A,
-        operations: &mut [embedded_hal_1::i2c::Operation<'_>],
-    ) -> Result<(), Self::Error> {
-        self.transaction(address.into(), operations).await
-    }
-}
-
 /// Frame type in I2C transaction.
 ///
 /// This tells each method what kind of framing to use, to generate a (repeated) start condition (ST

diff --git a/embassy-stm32/src/i2c/v1.rs b/embassy-stm32/src/i2c/v1.rs
@@ -298,7 +298,7 @@ impl<'d, M: PeriMode> I2c<'d, M, Master> {
     }
 
     /// Blocking read.
-    pub fn blocking_read(&mut self, addr: u8, read: &mut [u8]) -> Result<(), Error> {
+    pub fn blocking_read(&mut self, addr: Address, read: &mut [u8]) -> Result<(), Error> {
         self.blocking_read_timeout(addr, read, self.timeout(), FrameOptions::FirstAndLastFrame)
     }
 
@@ -821,3 +821,73 @@ impl<'d, M: PeriMode> SetConfig for I2c<'d, M, Master> {
         Ok(())
     }
 }
+
+// ======== Embedded HAL impls ========
+
+impl<'d, M: Mode, IM: MasterMode> embedded_hal_02::blocking::i2c::Read for I2c<'d, M, IM> {
+    type Error = Error;
+
+    fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error> {
+        self.blocking_read(address.into(), buffer)
+    }
+}
+
+impl<'d, M: Mode, IM: MasterMode> embedded_hal_02::blocking::i2c::Write for I2c<'d, M, IM> {
+    type Error = Error;
+
+    fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
+        self.blocking_write(address.into(), write)
+    }
+}
+
+impl<'d, M: Mode, IM: MasterMode> embedded_hal_02::blocking::i2c::WriteRead for I2c<'d, M, IM> {
+    type Error = Error;
+
+    fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
+        self.blocking_write_read(address.into(), write, read)
+    }
+}
+
+impl<'d, M: Mode, IM: MasterMode> embedded_hal_1::i2c::I2c for I2c<'d, M, IM> {
+    fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
+        self.blocking_read(address.into(), read)
+    }
+
+    fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
+        self.blocking_write(address.into(), write)
+    }
+
+    fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
+        self.blocking_write_read(address.into(), write, read)
+    }
+
+    fn transaction(
+        &mut self,
+        address: A,
+        operations: &mut [embedded_hal_1::i2c::Operation<'_>],
+    ) -> Result<(), Self::Error> {
+        self.blocking_transaction(address.into(), operations)
+    }
+}
+
+impl<'d, IM: MasterMode> embedded_hal_async::i2c::I2c for I2c<'d, Async, IM> {
+    async fn read(&mut self, address: u8, read: &mut [u8]) -> Result<(), Self::Error> {
+        self.read(address.into(), read).await
+    }
+
+    async fn write(&mut self, address: u8, write: &[u8]) -> Result<(), Self::Error> {
+        self.write(address.into(), write).await
+    }
+
+    async fn write_read(&mut self, address: u8, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
+        self.write_read(address.into(), write, read).await
+    }
+
+    async fn transaction(
+        &mut self,
+        address: u8,
+        operations: &mut [embedded_hal_1::i2c::Operation<'_>],
+    ) -> Result<(), Self::Error> {
+        self.transaction(address.into(), operations).await
+    }
+}
diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs
@@ -1198,3 +1198,91 @@ impl<'d, M: Mode> SetConfig for I2c<'d, M, MultiMaster> {
         Ok(())
     }
 }
+
+// ======== Embedded HAL impls ========
+
+impl<'d, M: Mode, IM: MasterMode, A: embedded_hal_02::blocking::i2c::AddressMode>
+    embedded_hal_02::blocking::i2c::Read<A> for I2c<'d, M, IM>
+where
+    A: Into<Address>,
+{
+    type Error = Error;
+
+    fn read(&mut self, address: A, buffer: &mut [u8]) -> Result<(), Self::Error> {
+        self.blocking_read(address.into(), buffer)
+    }
+}
+
+impl<'d, M: Mode, IM: MasterMode, A: embedded_hal_02::blocking::i2c::AddressMode>
+    embedded_hal_02::blocking::i2c::Write<A> for I2c<'d, M, IM>
+where
+    A: Into<Address>,
+{
+    type Error = Error;
+
+    fn write(&mut self, address: A, write: &[u8]) -> Result<(), Self::Error> {
+        self.blocking_write(address.into(), write)
+    }
+}
+
+impl<'d, M: Mode, IM: MasterMode, A: embedded_hal_02::blocking::i2c::AddressMode>
+    embedded_hal_02::blocking::i2c::WriteRead<A> for I2c<'d, M, IM>
+where
+    A: Into<Address>,
+{
+    type Error = Error;
+
+    fn write_read(&mut self, address: A, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
+        self.blocking_write_read(address.into(), write, read)
+    }
+}
+
+impl<'d, M: Mode, IM: MasterMode, A: embedded_hal_1::i2c::AddressMode> embedded_hal_1::i2c::I2c<A> for I2c<'d, M, IM>
+where
+    Address: From<A>,
+{
+    fn read(&mut self, address: A, read: &mut [u8]) -> Result<(), Self::Error> {
+        self.blocking_read(address.into(), read)
+    }
+
+    fn write(&mut self, address: A, write: &[u8]) -> Result<(), Self::Error> {
+        self.blocking_write(address.into(), write)
+    }
+
+    fn write_read(&mut self, address: A, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
+        self.blocking_write_read(address.into(), write, read)
+    }
+
+    fn transaction(
+        &mut self,
+        address: A,
+        operations: &mut [embedded_hal_1::i2c::Operation<'_>],
+    ) -> Result<(), Self::Error> {
+        self.blocking_transaction(address.into(), operations)
+    }
+}
+
+impl<'d, IM: MasterMode, A: embedded_hal_async::i2c::AddressMode> embedded_hal_async::i2c::I2c<A> for I2c<'d, Async, IM>
+where
+    Address: From<A>,
+{
+    async fn read(&mut self, address: A, read: &mut [u8]) -> Result<(), Self::Error> {
+        self.read(address.into(), read).await
+    }
+
+    async fn write(&mut self, address: A, write: &[u8]) -> Result<(), Self::Error> {
+        self.write(address.into(), write).await
+    }
+
+    async fn write_read(&mut self, address: A, write: &[u8], read: &mut [u8]) -> Result<(), Self::Error> {
+        self.write_read(address.into(), write, read).await
+    }
+
+    async fn transaction(
+        &mut self,
+        address: A,
+        operations: &mut [embedded_hal_1::i2c::Operation<'_>],
+    ) -> Result<(), Self::Error> {
+        self.transaction(address.into(), operations).await
+    }
+}