[RISC-V] Optimize redundant sext.w generation in GT_JCMP codegen #120642
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* Peephole optimization for redundant sext.w
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Pull Request Overview
This PR optimizes RISC-V code generation by eliminating redundant sign-extension instructions (sext.w) in jump comparison (GT_JCMP) nodes. The optimization detects when a previous instruction has already sign-extended a register and avoids emitting another sign-extension instruction immediately after.
Key changes:
- Added peephole optimization to detect redundant sign-extension instructions
- Implemented helper functions to identify instructions that perform sign-extension
- Applied the optimization in three specific code paths within jump comparison generation
Reviewed Changes
Copilot reviewed 3 out of 3 changed files in this pull request and generated 3 comments.
| File | Description |
|---|---|
| src/coreclr/jit/emitriscv64.h | Added function declarations for sign-extension detection and redundancy checking |
| src/coreclr/jit/emitriscv64.cpp | Implemented emitInsIsSignExtend and isRedundantSignExtend helper functions |
| src/coreclr/jit/codegenriscv64.cpp | Applied redundant sign-extension optimization in jump comparison code generation |
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Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch |
Co-authored-by: Copilot <[email protected]>
Co-authored-by: Copilot <[email protected]>
am11
reviewed
Oct 11, 2025
Co-authored-by: Adeel Mujahid <[email protected]>
|
Please check jit-format errors and fix them. |
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There was an issue when emitting instructions for GT_JCMP nodes: 4-byte operands are always sign-extended before the comparison.
The commit suppresses emitting the 'sext.w' if the last instruction has already sign-extended the operands of JCMP. It cannot optimize out the sign-extension if a previously sign-extending instruction is not emitted right before the emission of the JCMP instruction, as it is implemented as a peephole optimization to conservatively preserve type safety.
The optimization slightly improves the performance of loop-intensive benchmark by reducing the instruction count of hot code, while not affecting the jit workload time.
@clamp03 @tomeksowi @SkyShield, @credo-quia-absurdum
part of #84834, cc @dotnet/samsung