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update getlvalue() with ref parameter
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@WalterBright @dlang-bot
WalterBright authored and dlang-bot committed Jun 18, 2024
1 parent 1cdf7e2 commit 179e8d6
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Showing 6 changed files with 138 additions and 138 deletions.
2 changes: 1 addition & 1 deletion compiler/src/dmd/backend/x86/cg87.d
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Original file line number Diff line number Diff line change
Expand Up @@ -100,7 +100,7 @@ private void getlvalue87(ref CodeBuilder cdb, ref code pcs,elem *e,regm_t keepms
if (e.Eoper == OPvar || e.Eoper == OPrelconst)
e.Vsym.Sflags &= ~GTregcand;

getlvalue(cdb, &pcs, e, keepmsk);
getlvalue(cdb, pcs, e, keepmsk);
if (ADDFWAIT())
pcs.Iflags |= CFwait;
if (I32)
Expand Down
26 changes: 13 additions & 13 deletions compiler/src/dmd/backend/x86/cgxmm.d
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Original file line number Diff line number Diff line change
Expand Up @@ -310,12 +310,12 @@ void xmmeq(ref CodeBuilder cdb, elem *e, opcode_t op, elem *e1, elem *e2,regm_t
postinc = e11.E2.Vint;
if (e11.Eoper == OPpostdec)
postinc = -postinc;
getlvalue(cdb,&cs,e11,RMstore | retregs);
getlvalue(cdb,cs,e11,RMstore | retregs);
freenode(e11.E2);
}
else
{ postinc = 0;
getlvalue(cdb,&cs,e1,RMstore | retregs); // get lvalue (cl == CNIL if regvar)
getlvalue(cdb,cs,e1,RMstore | retregs); // get lvalue (cl == CNIL if regvar)
}

getregs_imm(cdb,regvar ? varregm : 0);
Expand Down Expand Up @@ -561,7 +561,7 @@ void xmmopass(ref CodeBuilder cdb,elem *e,regm_t *pretregs)

if (!regvar)
{
getlvalue(cdb,&cs,e1,rretregs); // get EA
getlvalue(cdb,cs,e1,rretregs); // get EA
retregs = *pretregs & XMMREGS & ~rretregs;
if (!retregs)
retregs = XMMREGS & ~rretregs;
Expand Down Expand Up @@ -630,7 +630,7 @@ void xmmpost(ref CodeBuilder cdb,elem *e,regm_t *pretregs)
code cs;
if (!regvar)
{
getlvalue(cdb,&cs,e1,0); // get EA
getlvalue(cdb,cs,e1,0); // get EA
retregs = XMMREGS & ~*pretregs;
if (!retregs)
retregs = XMMREGS;
Expand Down Expand Up @@ -1276,7 +1276,7 @@ static if (0)

if ((op1.Eoper == OPind && !op1.Ecount) || op1.Eoper == OPvar)
{
getlvalue(cdb,&cs, op1, RMload); // get addressing mode
getlvalue(cdb,cs, op1, RMload); // get addressing mode
}
else
{
Expand Down Expand Up @@ -1323,7 +1323,7 @@ static if (0)

if (((op2.Eoper == OPind && !op2.Ecount) || op2.Eoper == OPvar) && !isMOVHLPS)
{
getlvalue(cdb,&cs, op2, RMload | retregs); // get addressing mode
getlvalue(cdb,cs, op2, RMload | retregs); // get addressing mode
}
else
{
Expand Down Expand Up @@ -1424,7 +1424,7 @@ static if (0)
{
if ((e1.Eoper == OPind && !e1.Ecount) || e1.Eoper == OPvar)
{
cr = getlvalue(&cs, e1, RMload | retregs); // get addressing mode
cr = getlvalue(cs, e1, RMload | retregs); // get addressing mode
}
else
{
Expand Down Expand Up @@ -1477,7 +1477,7 @@ static if (0)
if (config.avx && e1.Eoper == OPind && !e1.Ecount)
{
// VBROADCASTSS X/YMM,MEM
getlvalue(cdb,&cs, e1, 0); // get addressing mode
getlvalue(cdb,cs, e1, 0); // get addressing mode
assert((cs.Irm & 0xC0) != 0xC0); // AVX1 doesn't have register source operands
const reg = allocreg(cdb,retregs,ty);
cs.Iop = VBROADCASTSS;
Expand Down Expand Up @@ -1517,7 +1517,7 @@ static if (0)
if (config.avx && tysize(ty) == 32 && e1.Eoper == OPind && !e1.Ecount)
{
// VBROADCASTSD YMM,MEM
getlvalue(cdb,&cs, e1, 0); // get addressing mode
getlvalue(cdb,cs, e1, 0); // get addressing mode
assert((cs.Irm & 0xC0) != 0xC0); // AVX1 doesn't have register source operands
const reg = allocreg(cdb,retregs,ty);
cs.Iop = VBROADCASTSD;
Expand Down Expand Up @@ -1559,7 +1559,7 @@ static if (0)
if (config.avx >= 2 && e1.Eoper == OPind && !e1.Ecount)
{
// VPBROADCASTB X/YMM,MEM
getlvalue(cdb,&cs, e1, 0); // get addressing mode
getlvalue(cdb,cs, e1, 0); // get addressing mode
assert((cs.Irm & 0xC0) != 0xC0); // AVX1 doesn't have register source operands
reg_t reg = allocreg(cdb,retregs,ty);
cs.Iop = VPBROADCASTB;
Expand Down Expand Up @@ -1625,7 +1625,7 @@ static if (0)
if (config.avx >= 2 && e1.Eoper == OPind && !e1.Ecount)
{
// VPBROADCASTW X/YMM,MEM
getlvalue(cdb,&cs, e1, 0); // get addressing mode
getlvalue(cdb,cs, e1, 0); // get addressing mode
assert((cs.Irm & 0xC0) != 0xC0); // AVX1 doesn't have register source operands
reg_t reg = allocreg(cdb,retregs,ty);
cs.Iop = VPBROADCASTW;
Expand Down Expand Up @@ -1677,7 +1677,7 @@ static if (0)
if (config.avx && e1.Eoper == OPind && !e1.Ecount)
{
// VPBROADCASTD/VBROADCASTSS X/YMM,MEM
getlvalue(cdb,&cs, e1, 0); // get addressing mode
getlvalue(cdb,cs, e1, 0); // get addressing mode
assert((cs.Irm & 0xC0) != 0xC0); // AVX1 doesn't have register source operands
reg_t reg = allocreg(cdb,retregs,ty);
cs.Iop = config.avx >= 2 ? VPBROADCASTD : VBROADCASTSS;
Expand Down Expand Up @@ -1719,7 +1719,7 @@ static if (0)
if (e1.Eoper == OPind && !e1.Ecount)
{
// VPBROADCASTQ/VBROADCASTSD/(V)PUNPCKLQDQ X/YMM,MEM
getlvalue(cdb,&cs, e1, 0); // get addressing mode
getlvalue(cdb,cs, e1, 0); // get addressing mode
assert((cs.Irm & 0xC0) != 0xC0); // AVX1 doesn't have register source operands
reg_t reg = allocreg(cdb,retregs,ty);
cs.Iop = config.avx >= 2 ? VPBROADCASTQ : tysize(ty) == 32 ? VBROADCASTSD : PUNPCKLQDQ;
Expand Down
30 changes: 15 additions & 15 deletions compiler/src/dmd/backend/x86/cod1.d
View file
Original file line number Diff line number Diff line change
Expand Up @@ -696,9 +696,9 @@ void loadea(ref CodeBuilder cdb,elem *e,code *cs,uint op,uint reg,targ_size_t of
}
}

getlvalue(cdb, cs, e, keepmsk);
getlvalue(cdb, *cs, e, keepmsk);
if (offset == REGSIZE)
getlvalue_msw(cs);
getlvalue_msw(*cs);
else
cs.IEV1.Voffset += offset;
if (I64)
Expand Down Expand Up @@ -798,7 +798,7 @@ uint getaddrmode(regm_t idxregs)
return mode;
}

void setaddrmode(code *c, regm_t idxregs)
void setaddrmode(ref code c, regm_t idxregs)
{
uint mode = getaddrmode(idxregs);
c.Irm = mode & 0xFF;
Expand All @@ -811,7 +811,7 @@ void setaddrmode(code *c, regm_t idxregs)
*/

@trusted
void getlvalue_msw(code *c)
void getlvalue_msw(ref code c)
{
if (c.IFL1 == FLreg)
{
Expand All @@ -830,7 +830,7 @@ void getlvalue_msw(code *c)
*/

@trusted
void getlvalue_lsw(code *c)
void getlvalue_lsw(ref code c)
{
if (c.IFL1 == FLreg)
{
Expand All @@ -847,19 +847,19 @@ void getlvalue_lsw(code *c)

/******************
* Compute addressing mode.
* Generate & return sequence of code (if any).
* Return in cs the info on it.
* Input:
* pcs -> where to store data about addressing mode
* e -> the lvalue elem
* keepmsk mask of registers we must not destroy or use
* Params:
* cdb = sink for any code generated
* pcs = set to addressing mode
* e = the lvalue elem
* keepmsk = mask of registers we must not destroy or use
* if (keepmsk & RMstore), this will be only a store operation
* into the lvalue
* if (keepmsk & RMload), this will be a read operation only
*/

@trusted
void getlvalue(ref CodeBuilder cdb,code *pcs,elem *e,regm_t keepmsk)
void getlvalue(ref CodeBuilder cdb,ref code pcs,elem *e,regm_t keepmsk)
{
FL fl;
uint f, opsave;
Expand Down Expand Up @@ -1161,12 +1161,12 @@ void getlvalue(ref CodeBuilder cdb,code *pcs,elem *e,regm_t keepmsk)
flagsave = pcs.Iflags;
ubyte rexsave = pcs.Irex;
pcs.Iop = LEA;
code_newreg(pcs, reg);
code_newreg(&pcs, reg);
if (!I16)
pcs.Iflags &= ~CFopsize;
if (I64)
pcs.Irex |= REX_W;
cdb.gen(pcs); // LEA idxreg,EA
cdb.gen(&pcs); // LEA idxreg,EA
cssave(e1,idxregs,true);
if (!I16)
{
Expand Down Expand Up @@ -4682,15 +4682,15 @@ void pushParams(ref CodeBuilder cdb, elem* e, uint stackalign, tym_t tyf)
cs.IEV1.Voffset -= REGSIZE;
cdb.gen(&cs); // PUSH EA+4
cdb.genadjesp(REGSIZE);
getlvalue_lsw(&cs);
getlvalue_lsw(cs);
cdb.gen(&cs); // PUSH EA+2
}
else /* TYlong */
loadea(cdb, e, &cs, 0xFF, 6, REGSIZE, 0, 0); // PUSH EA+2
cdb.genadjesp(REGSIZE);
}
cgstate.stackpush += sz;
getlvalue_lsw(&cs);
getlvalue_lsw(cs);
cdb.gen(&cs); // PUSH EA
cdb.genadjesp(REGSIZE);
freenode(e);
Expand Down
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