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committedNov 11, 2024·
SVA/LTL property instrumentation
1 parent 9d8f0af commit e6564c8

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Diff for: ‎CHANGELOG

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@@ -1,6 +1,7 @@
11
# EBMC 5.4
22

33
* BMC: Cadical support with --cadical
4+
* word-level BMC: LTL/SVA to Buechi with --buechi
45

56
# EBMC 5.3
67

Diff for: ‎regression/ebmc/Buechi/FGp1.desc

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CORE
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FGp1.smv
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--buechi --bound 2
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^\[.*\] F G p: PROVED up to bound 2$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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--

Diff for: ‎regression/ebmc/Buechi/FGp1.smv

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MODULE main
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VAR p : boolean;
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ASSIGN init(p) := FALSE;
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next(p) := TRUE;
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-- should pass
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LTLSPEC F G p

Diff for: ‎regression/ebmc/Buechi/Fp1.desc

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CORE
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Fp1.smv
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--buechi --bound 2
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^\[.*\] F p: PROVED up to bound 2$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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--

Diff for: ‎regression/ebmc/Buechi/Fp1.smv

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MODULE main
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VAR p : boolean;
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ASSIGN init(p) := FALSE;
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next(p) := TRUE;
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-- should pass
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LTLSPEC F p

Diff for: ‎regression/ebmc/Buechi/GFp1.desc

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CORE
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GFp1.smv
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--buechi --bound 2
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^\[.*\] G F p: PROVED up to bound 2$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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--

Diff for: ‎regression/ebmc/Buechi/GFp1.smv

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MODULE main
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VAR p : boolean;
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ASSIGN init(p) := FALSE;
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next(p) := !p;
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-- should pass
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LTLSPEC G F p

Diff for: ‎regression/ebmc/Buechi/Gp1.desc

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@@ -0,0 +1,9 @@
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CORE
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Gp1.smv
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--buechi --bound 2
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^\[.*\] G p: PROVED up to bound 2$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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--

Diff for: ‎regression/ebmc/Buechi/Gp1.smv

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MODULE main
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VAR p : boolean;
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ASSIGN init(p) := TRUE;
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next(p) := TRUE;
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-- should pass
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LTLSPEC G p

Diff for: ‎regression/ebmc/Buechi/Xp1.desc

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@@ -0,0 +1,9 @@
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CORE
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Xp1.smv
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--buechi --bound 2
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^\[.*\] X p: PROVED up to bound 2$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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--

Diff for: ‎regression/ebmc/Buechi/Xp1.smv

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MODULE main
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VAR p : boolean;
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ASSIGN init(p) := FALSE;
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next(p) := TRUE;
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-- should pass
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LTLSPEC X p

Diff for: ‎regression/ebmc/Buechi/and1.desc

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@@ -0,0 +1,9 @@
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CORE
2+
and1.smv
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--buechi --bound 2
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^\[.*\] X p & X q: PROVED up to bound 2$
5+
^EXIT=0$
6+
^SIGNAL=0$
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--
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^warning: ignoring
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--

Diff for: ‎regression/ebmc/Buechi/and1.smv

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MODULE main
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VAR p : boolean;
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5+
ASSIGN init(p) := FALSE;
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next(p) := TRUE;
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8+
VAR q : boolean;
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ASSIGN init(q) := FALSE;
11+
next(q) := TRUE;
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-- should pass
14+
LTLSPEC X p & X q
15+

Diff for: ‎regression/ebmc/Buechi/and2.desc

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@@ -0,0 +1,9 @@
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CORE
2+
and2.smv
3+
--buechi --bound 2
4+
^\[.*\] X \(p & q\): PROVED up to bound 2$
5+
^EXIT=0$
6+
^SIGNAL=0$
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--
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^warning: ignoring
9+
--

Diff for: ‎regression/ebmc/Buechi/and2.smv

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MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := FALSE;
6+
next(p) := TRUE;
7+
8+
VAR q : boolean;
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ASSIGN init(q) := FALSE;
11+
next(q) := TRUE;
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13+
-- should pass
14+
LTLSPEC X (p & q)
15+

Diff for: ‎regression/ebmc/Buechi/iff1.desc

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@@ -0,0 +1,9 @@
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CORE
2+
iff1.smv
3+
--buechi --bound 2
4+
^\[.*\] X p <-> X q: PROVED up to bound 2$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--

Diff for: ‎regression/ebmc/Buechi/iff1.smv

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@@ -0,0 +1,14 @@
1+
MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := TRUE;
6+
next(p) := FALSE;
7+
8+
VAR q : boolean;
9+
10+
ASSIGN init(q) := TRUE;
11+
next(q) := FALSE;
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13+
-- should pass
14+
LTLSPEC X p <-> X q

Diff for: ‎regression/ebmc/Buechi/iff2.desc

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@@ -0,0 +1,9 @@
1+
CORE
2+
iff2.smv
3+
--buechi --bound 2
4+
^\[.*\] X \(p <-> q\): PROVED up to bound 2$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--

Diff for: ‎regression/ebmc/Buechi/iff2.smv

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1+
MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := TRUE;
6+
next(p) := FALSE;
7+
8+
VAR q : boolean;
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10+
ASSIGN init(q) := TRUE;
11+
next(q) := FALSE;
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13+
-- should pass
14+
LTLSPEC X (p <-> q)

Diff for: ‎regression/ebmc/Buechi/implies1.desc

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@@ -0,0 +1,9 @@
1+
CORE
2+
implies1.smv
3+
--buechi --bound 2
4+
^\[.*\] X p -> X q: PROVED up to bound 2$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--

Diff for: ‎regression/ebmc/Buechi/implies1.smv

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@@ -0,0 +1,14 @@
1+
MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := TRUE;
6+
next(p) := FALSE;
7+
8+
VAR q : boolean;
9+
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ASSIGN init(q) := TRUE;
11+
next(q) := FALSE;
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-- should pass
14+
LTLSPEC X p -> X q

Diff for: ‎regression/ebmc/Buechi/implies2.desc

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@@ -0,0 +1,9 @@
1+
CORE
2+
implies2.smv
3+
--buechi --bound 2
4+
^\[.*\] X \(p -> q\): PROVED up to bound 2$
5+
^EXIT=0$
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^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--

Diff for: ‎regression/ebmc/Buechi/implies2.smv

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@@ -0,0 +1,14 @@
1+
MODULE main
2+
3+
VAR p : boolean;
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5+
ASSIGN init(p) := TRUE;
6+
next(p) := FALSE;
7+
8+
VAR q : boolean;
9+
10+
ASSIGN init(q) := TRUE;
11+
next(q) := FALSE;
12+
13+
-- should pass
14+
LTLSPEC X (p -> q)

Diff for: ‎regression/ebmc/Buechi/or1.desc

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1+
CORE
2+
or1.smv
3+
--buechi --bound 2
4+
^\[.*\] X p \| X q: PROVED up to bound 2$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--

Diff for: ‎regression/ebmc/Buechi/or1.smv

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,14 @@
1+
MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := FALSE;
6+
next(p) := TRUE;
7+
8+
VAR q : boolean;
9+
10+
ASSIGN init(q) := TRUE;
11+
next(q) := FALSE;
12+
13+
-- should pass
14+
LTLSPEC X p | X q

Diff for: ‎regression/ebmc/Buechi/or2.desc

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@@ -0,0 +1,9 @@
1+
CORE
2+
or2.smv
3+
--buechi --bound 2
4+
^\[.*\] X \(p \| q\): PROVED up to bound 2$
5+
^EXIT=0$
6+
^SIGNAL=0$
7+
--
8+
^warning: ignoring
9+
--

Diff for: ‎regression/ebmc/Buechi/or2.smv

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,14 @@
1+
MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := FALSE;
6+
next(p) := TRUE;
7+
8+
VAR q : boolean;
9+
10+
ASSIGN init(q) := TRUE;
11+
next(q) := FALSE;
12+
13+
-- should pass
14+
LTLSPEC X (p | q)

Diff for: ‎src/ebmc/bmc.cpp

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@@ -9,6 +9,7 @@ Author: Daniel Kroening, dkr@amazon.com
99
#include "bmc.h"
1010

1111
#include <solvers/prop/literal_expr.h>
12+
#include <temporal-logic/ltl_to_buechi.h>
1213
#include <trans-word-level/trans_trace_word_level.h>
1314
#include <trans-word-level/unwind.h>
1415

@@ -20,6 +21,7 @@ Author: Daniel Kroening, dkr@amazon.com
2021
void bmc(
2122
std::size_t bound,
2223
bool convert_only,
24+
bool buechi,
2325
const transition_systemt &transition_system,
2426
ebmc_propertiest &properties,
2527
const ebmc_solver_factoryt &solver_factory,
@@ -46,6 +48,12 @@ void bmc(
4648
if(property.is_disabled() || property.is_failure())
4749
continue;
4850

51+
// LTL/SVA to Buechi?
52+
if(buechi)
53+
{
54+
auto buechi = ltl_to_buechi(property.normalized_expr);
55+
}
56+
4957
// Is it supported by the BMC engine?
5058
if(!bmc_supports_property(property.normalized_expr))
5159
{

Diff for: ‎src/ebmc/bmc.h

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@@ -22,6 +22,7 @@ class transition_systemt;
2222
void bmc(
2323
std::size_t bound,
2424
bool convert_only,
25+
bool buechi,
2526
const transition_systemt &,
2627
ebmc_propertiest &,
2728
const ebmc_solver_factoryt &,

Diff for: ‎src/ebmc/ebmc_parse_options.cpp

+1-1
Original file line numberDiff line numberDiff line change
@@ -241,7 +241,6 @@ int ebmc_parse_optionst::doit()
241241
if(result != -1)
242242
return result;
243243

244-
// possibly apply liveness-to-safety
245244
if(cmdline.isset("liveness-to-safety"))
246245
liveness_to_safety(ebmc_base.transition_system, ebmc_base.properties);
247246

@@ -366,6 +365,7 @@ void ebmc_parse_optionst::help()
366365
" {y--systemverilog} \t force SystemVerilog instead of Verilog\n"
367366
" {y--reset} {uexpr} \t set up module reset\n"
368367
" {y--liveness-to-safety} \t translate liveness properties to safety properties\n"
368+
" {y--buechi} \t translate LTL/SVA properties to Buechi acceptance\n"
369369
"\n"
370370
"Methods:\n"
371371
" {y--k-induction} \t do k-induction with k=bound\n"

Diff for: ‎src/ebmc/ebmc_parse_options.h

+1-1
Original file line numberDiff line numberDiff line change
@@ -47,7 +47,7 @@ class ebmc_parse_optionst:public parse_options_baset
4747
"(compute-ct)(dot-netlist)(smv-netlist)(vcd):"
4848
"(random-traces)(trace-steps):(random-seed):(traces):"
4949
"(random-trace)(random-waveform)"
50-
"(liveness-to-safety)"
50+
"(liveness-to-safety)(buechi)"
5151
"I:D:(preprocess)(systemverilog)(vl2smv-extensions)"
5252
"(warn-implicit-nets)",
5353
argc,

Diff for: ‎src/ebmc/k_induction.cpp

+2-1
Original file line numberDiff line numberDiff line change
@@ -202,7 +202,8 @@ void k_inductiont::induction_base()
202202

203203
bmc(
204204
k,
205-
false,
205+
false, // convert_only
206+
false, // buechi
206207
transition_system,
207208
properties,
208209
solver_factory,

Diff for: ‎src/ebmc/property_checker.cpp

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Original file line numberDiff line numberDiff line change
@@ -83,6 +83,7 @@ property_checker_resultt word_level_bmc(
8383
bmc(
8484
bound,
8585
convert_only,
86+
cmdline.isset("buechi"),
8687
transition_system,
8788
properties,
8889
solver_factory,

Diff for: ‎src/temporal-logic/Makefile

+3-1
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,6 @@
1-
SRC = nnf.cpp \
1+
SRC = ltl_to_buechi.cpp \
2+
ltl_sva_to_string.cpp \
3+
nnf.cpp \
24
normalize_property.cpp \
35
temporal_logic.cpp \
46
trivial_sva.cpp \

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