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SVA/LTL property instrumentation
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Diff for: CHANGELOG

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@@ -5,6 +5,7 @@
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use --bmc-with-assumptions to re-enable the previous algorithm.
66
* SystemVerilog: streaming concatenation {<<{...}} and {>>{...}}
77
* SystemVerilog: set membership operator
8+
* word-level BMC: LTL/SVA to Buechi with --buechi
89

910
# EBMC 5.3
1011

Diff for: regression/ebmc/Buechi/FGp1.desc

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CORE
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FGp1.smv
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--buechi --bound 2
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^\[.*\] F G p: PROVED up to bound 2$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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--

Diff for: regression/ebmc/Buechi/FGp1.smv

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@@ -0,0 +1,9 @@
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MODULE main
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VAR p : boolean;
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ASSIGN init(p) := FALSE;
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next(p) := TRUE;
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-- should pass
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LTLSPEC F G p

Diff for: regression/ebmc/Buechi/Fp1.desc

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@@ -0,0 +1,9 @@
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CORE
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Fp1.smv
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--buechi --bound 2
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^\[.*\] F p: PROVED up to bound 2$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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--

Diff for: regression/ebmc/Buechi/Fp1.smv

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@@ -0,0 +1,9 @@
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MODULE main
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VAR p : boolean;
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ASSIGN init(p) := FALSE;
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next(p) := TRUE;
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-- should pass
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LTLSPEC F p

Diff for: regression/ebmc/Buechi/GFp1.desc

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@@ -0,0 +1,9 @@
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CORE
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GFp1.smv
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--buechi --bound 2
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^\[.*\] G F p: PROVED up to bound 2$
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^EXIT=0$
6+
^SIGNAL=0$
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--
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^warning: ignoring
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--

Diff for: regression/ebmc/Buechi/GFp1.smv

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@@ -0,0 +1,9 @@
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MODULE main
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VAR p : boolean;
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ASSIGN init(p) := FALSE;
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next(p) := !p;
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-- should pass
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LTLSPEC G F p

Diff for: regression/ebmc/Buechi/Gp1.desc

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@@ -0,0 +1,9 @@
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CORE
2+
Gp1.smv
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--buechi --bound 2
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^\[.*\] G p: PROVED up to bound 2$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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--

Diff for: regression/ebmc/Buechi/Gp1.smv

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
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MODULE main
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VAR p : boolean;
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ASSIGN init(p) := TRUE;
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next(p) := TRUE;
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-- should pass
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LTLSPEC G p

Diff for: regression/ebmc/Buechi/Xp1.desc

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@@ -0,0 +1,9 @@
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CORE
2+
Xp1.smv
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--buechi --bound 2
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^\[.*\] X p: PROVED up to bound 2$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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--

Diff for: regression/ebmc/Buechi/Xp1.smv

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
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MODULE main
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VAR p : boolean;
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ASSIGN init(p) := FALSE;
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next(p) := TRUE;
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-- should pass
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LTLSPEC X p

Diff for: regression/ebmc/Buechi/and1.desc

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@@ -0,0 +1,9 @@
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CORE
2+
and1.smv
3+
--buechi --bound 2
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^\[.*\] X p & X q: PROVED up to bound 2$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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--

Diff for: regression/ebmc/Buechi/and1.smv

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,15 @@
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MODULE main
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VAR p : boolean;
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ASSIGN init(p) := FALSE;
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next(p) := TRUE;
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VAR q : boolean;
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ASSIGN init(q) := FALSE;
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next(q) := TRUE;
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-- should pass
14+
LTLSPEC X p & X q
15+

Diff for: regression/ebmc/Buechi/and2.desc

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@@ -0,0 +1,9 @@
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CORE
2+
and2.smv
3+
--buechi --bound 2
4+
^\[.*\] X \(p & q\): PROVED up to bound 2$
5+
^EXIT=0$
6+
^SIGNAL=0$
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--
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^warning: ignoring
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--

Diff for: regression/ebmc/Buechi/and2.smv

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@@ -0,0 +1,15 @@
1+
MODULE main
2+
3+
VAR p : boolean;
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5+
ASSIGN init(p) := FALSE;
6+
next(p) := TRUE;
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VAR q : boolean;
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ASSIGN init(q) := FALSE;
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next(q) := TRUE;
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-- should pass
14+
LTLSPEC X (p & q)
15+

Diff for: regression/ebmc/Buechi/iff1.desc

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
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CORE
2+
iff1.smv
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--buechi --bound 2
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^\[.*\] X p <-> X q: PROVED up to bound 2$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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--

Diff for: regression/ebmc/Buechi/iff1.smv

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,14 @@
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MODULE main
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VAR p : boolean;
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ASSIGN init(p) := TRUE;
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next(p) := FALSE;
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VAR q : boolean;
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ASSIGN init(q) := TRUE;
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next(q) := FALSE;
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-- should pass
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LTLSPEC X p <-> X q

Diff for: regression/ebmc/Buechi/iff2.desc

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@@ -0,0 +1,9 @@
1+
CORE
2+
iff2.smv
3+
--buechi --bound 2
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^\[.*\] X \(p <-> q\): PROVED up to bound 2$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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--

Diff for: regression/ebmc/Buechi/iff2.smv

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@@ -0,0 +1,14 @@
1+
MODULE main
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VAR p : boolean;
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ASSIGN init(p) := TRUE;
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next(p) := FALSE;
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VAR q : boolean;
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ASSIGN init(q) := TRUE;
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next(q) := FALSE;
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-- should pass
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LTLSPEC X (p <-> q)

Diff for: regression/ebmc/Buechi/implies1.desc

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@@ -0,0 +1,9 @@
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CORE
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implies1.smv
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--buechi --bound 2
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^\[.*\] X p -> X q: PROVED up to bound 2$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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--

Diff for: regression/ebmc/Buechi/implies1.smv

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@@ -0,0 +1,14 @@
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MODULE main
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VAR p : boolean;
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ASSIGN init(p) := TRUE;
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next(p) := FALSE;
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VAR q : boolean;
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ASSIGN init(q) := TRUE;
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next(q) := FALSE;
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-- should pass
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LTLSPEC X p -> X q

Diff for: regression/ebmc/Buechi/implies2.desc

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@@ -0,0 +1,9 @@
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CORE
2+
implies2.smv
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--buechi --bound 2
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^\[.*\] X \(p -> q\): PROVED up to bound 2$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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--

Diff for: regression/ebmc/Buechi/implies2.smv

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@@ -0,0 +1,14 @@
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MODULE main
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VAR p : boolean;
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ASSIGN init(p) := TRUE;
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next(p) := FALSE;
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VAR q : boolean;
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ASSIGN init(q) := TRUE;
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next(q) := FALSE;
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-- should pass
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LTLSPEC X (p -> q)

Diff for: regression/ebmc/Buechi/or1.desc

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@@ -0,0 +1,9 @@
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CORE
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or1.smv
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--buechi --bound 2
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^\[.*\] X p \| X q: PROVED up to bound 2$
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^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
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--

Diff for: regression/ebmc/Buechi/or1.smv

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,14 @@
1+
MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := FALSE;
6+
next(p) := TRUE;
7+
8+
VAR q : boolean;
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ASSIGN init(q) := TRUE;
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next(q) := FALSE;
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-- should pass
14+
LTLSPEC X p | X q

Diff for: regression/ebmc/Buechi/or2.desc

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@@ -0,0 +1,9 @@
1+
CORE
2+
or2.smv
3+
--buechi --bound 2
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^\[.*\] X \(p \| q\): PROVED up to bound 2$
5+
^EXIT=0$
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^SIGNAL=0$
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--
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^warning: ignoring
9+
--

Diff for: regression/ebmc/Buechi/or2.smv

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@@ -0,0 +1,14 @@
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MODULE main
2+
3+
VAR p : boolean;
4+
5+
ASSIGN init(p) := FALSE;
6+
next(p) := TRUE;
7+
8+
VAR q : boolean;
9+
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ASSIGN init(q) := TRUE;
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next(q) := FALSE;
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-- should pass
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LTLSPEC X (p | q)

Diff for: src/ebmc/Makefile

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@@ -15,6 +15,7 @@ SRC = \
1515
ebmc_parse_options.cpp \
1616
ebmc_properties.cpp \
1717
ebmc_solver_factory.cpp \
18+
instrument_buechi.cpp \
1819
k_induction.cpp \
1920
liveness_to_safety.cpp \
2021
live_signal.cpp \

Diff for: src/ebmc/ebmc_parse_options.cpp

+10-1
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@ Author: Daniel Kroening, [email protected]
1818
#include "ebmc_error.h"
1919
#include "ebmc_version.h"
2020
#include "ic3_engine.h"
21+
#include "instrument_buechi.h"
2122
#include "liveness_to_safety.h"
2223
#include "neural_liveness.h"
2324
#include "property_checker.h"
@@ -241,7 +242,14 @@ int ebmc_parse_optionst::doit()
241242
if(result != -1)
242243
return result;
243244

244-
// possibly apply liveness-to-safety
245+
// LTL/SVA to Buechi?
246+
if(cmdline.isset("buechi"))
247+
instrument_buechi(
248+
ebmc_base.transition_system,
249+
ebmc_base.properties,
250+
ui_message_handler);
251+
252+
// Liveness to safety?
245253
if(cmdline.isset("liveness-to-safety"))
246254
liveness_to_safety(ebmc_base.transition_system, ebmc_base.properties);
247255

@@ -366,6 +374,7 @@ void ebmc_parse_optionst::help()
366374
" {y--systemverilog} \t force SystemVerilog instead of Verilog\n"
367375
" {y--reset} {uexpr} \t set up module reset\n"
368376
" {y--liveness-to-safety} \t translate liveness properties to safety properties\n"
377+
" {y--buechi} \t translate LTL/SVA properties to Buechi acceptance\n"
369378
"\n"
370379
"Methods:\n"
371380
" {y--k-induction} \t do k-induction with k=bound\n"

Diff for: src/ebmc/ebmc_parse_options.h

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@@ -48,7 +48,7 @@ class ebmc_parse_optionst:public parse_options_baset
4848
"(random-traces)(trace-steps):(random-seed):(traces):"
4949
"(random-trace)(random-waveform)"
5050
"(bmc-with-assumptions)"
51-
"(liveness-to-safety)"
51+
"(liveness-to-safety)(buechi)"
5252
"I:D:(preprocess)(systemverilog)(vl2smv-extensions)"
5353
"(warn-implicit-nets)",
5454
argc,

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