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1. Python_Practice Python_Practice Public

   Practicing Python Coding

   Python 1

2. 3-Stage-Pipelined-Half-precision-Floating-Point-Adder 3-Stage-Pipelined-Half-precision-Floating-Point-Adder Public

   Verilog 1

3. Data-Aquisation-System-using-CAN-Protocol Data-Aquisation-System-using-CAN-Protocol Public

   C

4. Five-stage-32-bit-MIPS-architecture- Five-stage-32-bit-MIPS-architecture- Public

   Verilog

5. Parallel-to-Serial-Interface-using-Asynch-FIFO- Parallel-to-Serial-Interface-using-Asynch-FIFO- Public

   Low Power parallel to serial interface using asynchronous FIFO

   SystemVerilog 1 1

6. SystemVerilog_Coding_Practice SystemVerilog_Coding_Practice Public

   SystemVerilog 1