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  1. esl-epfl/x-heep Public

    eXtendable Heterogeneous Energy-Efficient Platform based on RISC-V

    C 170 95

  2. openhwgroup/cv32e40p Public

    CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform

    SystemVerilog 1k 443

  3. lowRISC/ibex Public

    Ibex is a small 32 bit RISC-V CPU core, previously known as zero-riscy.

    SystemVerilog 1.5k 586

228 contributions in the last year

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Activity overview

Contributed to esl-epfl/x-heep, openhwgroup/cv32e40p, openhwgroup/cve2 and 23 other repositories
Loading A graph representing davideschiavone's contributions from March 24, 2024 to March 28, 2025. The contributions are 33% commits, 31% code review, 25% pull requests, 11% issues.

Contribution activity

March 2025

Created 2 commits in 1 repository
Opened 2 pull requests in 2 repositories
  • fix rf_we
    This contribution was made on Mar 17
Reviewed 10 pull requests in 2 repositories
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