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Add mouse events in FIFO instead of absolute coordinates
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Daniel Cliche committed Jun 5, 2024
1 parent 9ea176e commit a274a98
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Showing 4 changed files with 64 additions and 48 deletions.
2 changes: 1 addition & 1 deletion doc/memory_map.rst
Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,7 @@ LED BASE_IO + 4
UART BASE_IO + 8
SD_CARD BASE_IO + 16
KEYBOARD BASE_IO + 24
MOUSE BASE_IO + 24
GRAPHITE BASE_IO + 32
CONFIG BASE_IO + 36
MOUSE BASE_IO + 40
================== ===============
31 changes: 23 additions & 8 deletions doc/mouse.rst
Original file line number Diff line number Diff line change
Expand Up @@ -9,22 +9,37 @@ Registers
=============== =============
Register Address
=============== =============
MOUSE BASE_IO + 24
MOUSE_STATUS BASE_IO + 40
MOUSE_DATA BASE_IO + 44
=============== =============

MOUSE
^^^^^
MOUSE_STATUS
^^^^^^^^^^^^

Read:

===== ============================
Field Description
===== ============================
[28] Mouse event available?
===== ============================

Write: -

MOUSE_DATA
^^^^^^^^^^

Read:

======= ============================
Field Description
======= ============================
[9:0] X position
[21:12] Y position
[24] Left button
[25] Middle button
[26] Right button
[7:0] Delta Z
[15:8] Delta Y
[23:16] Delta X
[24] Left button pressed?
[25] Right button pressed?
[26] Middle button pressed?
======= ============================

Write: -
52 changes: 24 additions & 28 deletions soc/rtl/ps2mouse.v
Original file line number Diff line number Diff line change
Expand Up @@ -27,22 +27,15 @@ CONNECTION WITH THE DEALINGS IN OR USE OR PERFORMANCE OF THE SOFTWARE.*/

module ps2mouse
#(
parameter c_x_bits = 11, // >= 8
parameter c_y_bits = 11, // >= 8
parameter c_y_neg = 0,
parameter c_z_bits = 11, // >= 4
parameter c_z_ena = 1, // 1:yes wheel, 0:not wheel
parameter c_hotplug = 1
parameter c_z_ena = 1 // 1:yes wheel, 0:not wheel
)
(
input clk, clk_ena,
input clk,
input ps2m_reset,
inout ps2m_clk, ps2m_dat,
output reg update,
output reg [c_x_bits-1:0] x,
output reg [c_y_bits-1:0] y,
output reg [c_z_bits-1:0] z,
output reg [2:0] btn
input done, // "word has been read"
output rdy, // "word is available"
output [26:0] data
);
reg [2:0] sent;
localparam c_rx_bits = c_z_ena ? 42 : 31;
Expand All @@ -51,11 +44,12 @@ module ps2mouse
reg [14:0] count;
reg [5:0] filter;
reg req;
wire shift, endbit, endcount, done, run;
wire shift, endbit, endcount, donereq, run;
wire [8:0] cmd; //including odd tx parity bit
wire [c_x_bits-1:0] dx;
wire [c_y_bits-1:0] dy;
wire [c_z_bits-1:0] dz;
wire [7:0] dx;
wire [7:0] dy;
wire [7:0] dz;
wire [2:0] btn;

// 322222222221111111111 (scroll mouse z and rx parity p ignored)
// 0987654321098765432109876543210 X, Y = overflow
Expand Down Expand Up @@ -87,32 +81,34 @@ module ps2mouse
// first bit that enters rx at MSB is 1 and it is shifted to the right
// when this bit reaches the position in rx, it indicates end of transmission
assign endbit = run ? ~rx[0] : ~rx[$bits(rx)-21];
assign done = endbit & endcount & ~req;
assign donereq = endbit & endcount & ~req;
assign dx = {{($bits(dx)-8){rx[5]}}, rx[7] ? 8'b0 : rx[19:12]}; //sign+overfl
assign dy = {{($bits(dy)-8){rx[6]}}, rx[8] ? 8'b0 : rx[30:23]}; //sign+overfl
generate
if(c_z_ena)
assign dz = {{($bits(dz)-3){rx[37]}}, rx[37:34]}; //sign,wheel
endgenerate
// assign out = {run, // full debug
// run ? {rx[25:0], endbit} : {rx[30:10], endbit, sent, tx[0], ~req}};
// assign out = {run, // debug then normal
// run ? {btns, 2'b0, y, 2'b0, x} : {rx[30:10], sent, endbit, tx[0], ~req}};
assign btn = rx[3:1];
assign ps2m_clk = req ? 1'b0 : 1'bz; //bidir clk/request
assign ps2m_dat = ~tx[0] ? 1'b0 : 1'bz; //bidir data

reg [3:0] inptr, outptr;
reg [26:0] fifo [15:0]; // 16 word buffer

assign data = fifo[outptr];
assign rdy = ~(inptr == outptr);

always @ (posedge clk) begin
filter <= {filter[$bits(filter)-2:0], ps2m_clk};
count <= (ps2m_reset | shift | endcount) ? 0 : count+1;
req <= ~ps2m_reset & ~run & (req ^ endcount);
sent <= ps2m_reset ? 0 : (done & ~run) ? sent+1 : sent;
sent <= ps2m_reset ? 0 : (donereq & ~run) ? sent+1 : sent;
tx <= (ps2m_reset | run) ? {$bits(tx){1'b1}} : req ? {cmd, 1'b0} : shift ? {1'b1, tx[$bits(tx)-1:1]} : tx;
rx <= (ps2m_reset | done) ? {$bits(rx){1'b1}} : (shift & ~endbit) ? {ps2m_dat, rx[$bits(rx)-1:1]} : rx;
x <= ~run ? 0 : done ? x + dx : x;
y <= ~run ? 0 : done ? (c_y_neg ? y + dy : y - dy) : y;
z <= ~run ? 0 : done ? z + dz : z;
btn <= ~run ? 0 : done ? rx[3:1] : btn;
update <= done;
rx <= (ps2m_reset | donereq) ? {$bits(rx){1'b1}} : (shift & ~endbit) ? {ps2m_dat, rx[$bits(rx)-1:1]} : rx;

outptr <= ps2m_reset ? 0 : rdy & done ? outptr+1 : outptr;
inptr <= ps2m_reset ? 0 : run & donereq ? inptr+1 : inptr;
if (donereq) fifo[inptr] <= {btn, dx, dy, dz};
end

endmodule
27 changes: 16 additions & 11 deletions soc/rtl/soc_top.sv
Original file line number Diff line number Diff line change
Expand Up @@ -144,7 +144,9 @@ module soc_top #(
logic [7:0] dataKbd;
logic rdyKbd;
logic doneKbd;
logic [27:0] dataMs;
logic rdyMs;
logic doneMs;
logic [26:0] dataMs;
logic limit; // of cnt0

logic [16:0] cnt0 = 0;
Expand Down Expand Up @@ -302,18 +304,13 @@ module soc_top #(
.viddata(inbusvid), .de(de), .RGB(RGB), .hsync(vga_hsync), .vsync(vga_vsync));
ps2kbd ps2kbd(.clk(clk_cpu), .rst(rst_n), .done(doneKbd), .rdy(rdyKbd), .shift(),
.data(dataKbd), .PS2C(ps2clka_i), .PS2D(ps2data_i));
logic [2:0] mousebtn;
ps2mouse
#(.c_x_bits(10), .c_y_bits(10), .c_y_neg(1), .c_z_ena(0), .c_hotplug(1))
#(.c_z_ena(1))
ps2mouse
(
.clk(clk_cpu), .clk_ena(1'b1), .ps2m_reset(~rst_n), .ps2m_clk(ps2clkb_io), .ps2m_dat(ps2datb_io),
.x(dataMs[9:0]), .y(dataMs[21:12]), .btn(mousebtn)
.clk(clk_cpu), .ps2m_reset(~rst_n), .ps2m_clk(ps2clkb_io), .ps2m_dat(ps2datb_io),
.done(doneMs), .rdy(rdyMs), .data(dataMs)
);
assign dataMs[24] = mousebtn[1]; // left
assign dataMs[25] = mousebtn[2]; // middle
assign dataMs[26] = mousebtn[0]; // right
assign dataMs[27] = 1'b1;

// Graphite
logic graphite_cmd_axis_tvalid;
Expand Down Expand Up @@ -364,10 +361,12 @@ module soc_top #(
(iowadr == 3) ? {30'b0, rdyTx, rdyRx} :
(iowadr == 4) ? spiRx :
(iowadr == 5) ? {31'b0, spiRdy} :
(iowadr == 6) ? {3'b0, rdyKbd, dataMs} :
(iowadr == 6) ? {3'b0, rdyKbd, 28'd0} :
(iowadr == 7) ? {24'b0, dataKbd} :
(iowadr == 8) ? {31'b0, graphite_cmd_axis_tready} :
(iowadr == 9) ? {16'(H_RES), 16'(V_RES)} : 32'd0);
(iowadr == 9) ? {16'(H_RES), 16'(V_RES)} :
(iowadr == 10) ? {3'b0, rdyMs, 28'd0} :
(iowadr == 11) ? {5'b0, dataMs} : 32'd0);

assign dataTx = outbus[7:0];
assign startTx = wr & ioenb & (iowadr == 2);
Expand All @@ -383,6 +382,12 @@ module soc_top #(
doneKbd <= 1'b1;
end

always @(posedge clk_cpu) begin
doneMs <= 1'b0;
if (rd & ioenb & (iowadr == 11))
doneMs <= 1'b1;
end

// Auto reset and counter
always_ff @(posedge clk_cpu) begin
`ifdef SYNTHESIS
Expand Down

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