Name		Name	Last commit message	Last commit date
_xmsgs		_xmsgs
isim		isim
xst/work		xst/work
DSDminiproject.ise		DSDminiproject.ise
DSDminiproject.ise_ISE_Backup		DSDminiproject.ise_ISE_Backup
FPP_MULT_stx.prj		FPP_MULT_stx.prj
Layer_2_stx.prj		Layer_2_stx.prj
README.md		README.md
Top_module.vhd		Top_module.vhd
Top_module_stx.prj		Top_module_stx.prj
XOR.vhd		XOR.vhd
__ISE_repository_DSDminiproject.ise_.lock		__ISE_repository_DSDminiproject.ise_.lock
asvas.vhd		asvas.vhd
feedforward.vhd		feedforward.vhd
feedforward_stx.prj		feedforward_stx.prj
isim.cmd		isim.cmd
l1_error.vhd		l1_error.vhd
l1_error_stx.prj		l1_error_stx.prj
l1delta.vhd		l1delta.vhd
l1delta_stx.prj		l1delta_stx.prj
l2delta.vhd		l2delta.vhd
l2delta_stx.prj		l2delta_stx.prj
layer1.vhd		layer1.vhd
layer1_stx.prj		layer1_stx.prj
layer2.vhd		layer2.vhd
mypackage.vhd		mypackage.vhd
pepExtractor.prj		pepExtractor.prj
syn_0_update.vhd		syn_0_update.vhd
syn_0_update_beh.prj		syn_0_update_beh.prj
syn_0_update_isim_beh.exe		syn_0_update_isim_beh.exe
syn_0_update_stx.prj		syn_0_update_stx.prj
syn_1_update.vhd		syn_1_update.vhd
syn_1_update_stx.prj		syn_1_update_stx.prj
test_bench.ant		test_bench.ant
test_bench.jhd		test_bench.jhd
test_bench.tbw		test_bench.tbw
test_bench.vhw		test_bench.vhw
test_bench.xwv		test_bench.xwv
test_bench.xwv_bak		test_bench.xwv_bak
test_bench_bencher.prj		test_bench_bencher.prj
train.vhd		train.vhd
train_weights.vhd		train_weights.vhd
train_weights_beh.prj		train_weights_beh.prj
train_weights_stx.prj		train_weights_stx.prj
xilinxsim.ini		xilinxsim.ini

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NeuralNetworkXOR_VHDL

Implementation of a Neural Network for the XOR problem as part of project work for Digital System Design course .

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