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feat(riscv/iommu): update support for RISC-V IOMMU Device Directory Table #150

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feat(riscv/iommu): update support for RISC-V IOMMU Device Directory Table #150

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565359b
style: format files using clang-format-19
malejo97 May 25, 2024
00f78a1
update(riscv/iommu): add multi-lvl DDT support
malejo97 May 25, 2024
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2 changes: 1 addition & 1 deletion src/arch/armv8/armv8-r/mpu.c
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Original file line number Diff line number Diff line change
Expand Up @@ -116,7 +116,7 @@ static inline void mpu_entry_set_perms(struct mp_region* mpr, struct mpu_perms m
bool el1_priv = mpu_perms.el1 != PERM_NONE;
perms_t perms = mpu_perms.el1 | mpu_perms.el2;

mpr->mem_flags.prbar &= (uint16_t) ~(PRBAR_PERMS_FLAGS_MSK);
mpr->mem_flags.prbar &= (uint16_t)~(PRBAR_PERMS_FLAGS_MSK);
if (perms & PERM_W) {
mpr->mem_flags.prbar |= PRBAR_AP_RW_EL2;
} else {
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11 changes: 11 additions & 0 deletions src/arch/riscv/inc/arch/iommu.h
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Expand Up @@ -13,4 +13,15 @@ struct iommu_vm_arch {
EMPTY_STRUCT_FIELDS
};

struct vm;
void rv_iommu_fq_irq_handler(irqid_t irq_id);
void alloc_2lvl_vptrs(void);
void up_1lvl_to_2lvl(void);
void alloc_3lvl_vptrs(void);
void up_2lvl_to_3lvl(void);
void ddt_init(void);
void rv_iommu_init(void);
bool rv_iommu_alloc_did(deviceid_t dev_id);
void rv_iommu_write_ddt(deviceid_t dev_id, struct vm* vm, paddr_t root_pt);

#endif /* __IOMMU_ARCH_H__ */
1 change: 0 additions & 1 deletion src/arch/riscv/inc/arch/platform.h
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Expand Up @@ -23,7 +23,6 @@ struct arch_platform {

struct {
paddr_t base; // Base address of the IOMMU mmapped IF
unsigned mode; // Overall IOMMU mode (Off, Bypass, DDT-lvl)
irqid_t fq_irq_id; // Fault Queue IRQ ID (wired)
} iommu;

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