Conversation
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In which step of the pipeline would it make more sense to generate the LLVM IR code? during evaluation? or would it make sense to add an extra step on the pipeline that would just create that intermediate representation, which could then be called on the eval? |
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Also, initially I had the idea of having a specific function to run the kernels, but since I will be generating the LLVM IR, wouldn't it make more sense/be seamless to the user if the only thing the user had to do on their code was add the gpu decorator? I feel like it wouldn't make sense to add a specific config data structure just for that, specially since I will be needing to generate the kernel, unless I evaluate the expression, extract the params and then try to pass them to the kernel, but that seems a bit sketchy, when it could be done by adding parameters to the decorator |
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Although I was tagged rather accidentally here (that happens often, greetings to @cpu ), it somehow reminded me of an experiment that I made many years ago: http://jocl.org/GroovyGPU/ . Good luck with whatever you're building here 👍 |
… normal/core ast and gpu ast (not sure if this is the smartest way of doing this)
… before finishing this)
…e GPU AST and llvm instructions
I remember your project! A couple of years before, I did a similar thing for java (https://github.com/AEminium/AeminiumGPU and https://github.com/AEminium/AeminiumGPUCompiler/)! Really cool! Sorry for bothering you! |
…ess prone to errors if kwargs was a thing)
…nt for now, but I assume on the GPU side it will be important)
… -> lower -> generate -> optimize -> execute)
…ication (needs further testing, but probably will be easier to create e2e tests)
…ot execute, It can still generate llvmir code, It's hard to verify if there are no partial applications when anf and curry is considered
…hings are more isolated and less likely to break
…ignatures, enhance LLVM tests with additional e2e scenarios
…n-ascii characters)
…pecific handling in recursive evaluation
…ations, and enhance abstraction generation
… vector operation handling
…ate_ir`, add `get_signature`
…ow with LLVM compilation
…rnels` to `generate_ir`
…rnels` to `generate_ir`
…and LLVM IR generation
…on and type conversion
…on and execution
…tion support, refactor validation steps and type inference methods
3 participants
CPU
Implementation
Possible Improvements
GPU
Implementation
CUDA
Possible Improvements
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