SMART IO Glitch Filter

This code example shows how to configure the glitch filter using Smart I/O functionality.

Device

The device used in this code example (CE) is:

• TRAVEO™ T2G CYT4BF Series
• TRAVEO™ T2G CYT2BL Series

Board

The board used for testing is:

• TRAVEO™ T2G evaluation kit (KIT_T2G-B-H_EVK)
• TRAVEO™ T2G Body Entry Lite evaluation kit (KIT_T2G-B-E_LITE)

Scope of work

In this example, glitch signal is connected to Smart I/O to filter the glitch and provide a filtered output signal. No CPU load is required to perform the filtering, except for initialization of general-purpose input/output (GPIO) and Smart I/O.

Introduction

The Smart I/O block adds programmable logic to an I/O port. This programmable logic integrates board-level Boolean logic functionality such as AND, OR, and XOR into the port. The Smart I/O block has these features:

• Integrate board-level Boolean logic functionality into a port
• Ability to pre-process high-speed I/O matrix (HSIOM) input signals from the GPIO port pins
• Support in all device power modes
• Integrate closely to the I/O pads, providing shortest signal paths with programmability

The internal logic of the Smart I/O includes these components:

• Clock/reset
• Synchronizers
• Three-input lookup table (LUT)
• Data unit

More details can be found in:

• TRAVEO™ T2G CYT4BF Series
  • Technical Reference Manual (TRM)
  • Registers TRM
  • Data Sheet
• TRAVEO™ T2G CYT2BL Series
  • Technical Reference Manual (TRM)
  • Registers TRM
  • Data Sheet

Hardware setup

This CE has been developed for:

• TRAVEO™ T2G evaluation kit (KIT_T2G-B-H_EVK)
  

• TRAVEO™ T2G Body Entry Lite evaluation kit (KIT_T2G-B-E_LITE)
  

Using a jumper wire, connect the USER BTN1 pin to the Smart I/O input pin on the board.

• GPIO pins list

  Board	Glitch signal output pin	Smart I/O input pin	Smart I/O output pin
  KIT_T2G-B-H_EVK	P21[4]	P12[7]	P12[1]
  KIT_T2G-B-E_LITE	P5[3]	P13[7]	P13[1]

Implementation

In this code example, A 3-sample Glitch Filter is implemented with components clock and LUTs of Smart I/O sub system:

Glitch filter design

ModusToolBox Device configurator

This code example project can be created or imported using ModusToolBox IDE. To configure the project in the Quick Panel, click on DeviceConfigurator and to configure the smartIO click on Smart I/O Configurator

The SmartI/O and configuration for each LUT is described in below diagrams:

Configuration Enabling smart I/O

Configuration Smart I/O routing

Configuration LUT1

Configuration LUT2

Configuration LUT3

Configuration LUT4

Configuration LUT5

Configuration LUT6

Configuration LUT7

Configuration clock

The basic idea is that the filter will only change its state if last consecutive 3 sampled value and the current input value are identical and differ with current filter output value.

Cy_SmartIO_Init() reflects these configurations to the device, then Cy_SmartIO_Enable() enables the configured functionality.

This code example generates the signal to be filtered by software, in its main() loop. Cy_GPIO_Write() and Cy_SysLib_Delay() are called to generate the signal. The signal can be configured by GLITCH_TIME, HIGHTIME and LOWTIME.

Compiling and programming

Before testing this code example:

• Power the board through the dedicated power connector
• Connect the board to the PC through the USB interface
• Build the project using the dedicated Build button or by right-clicking the project name and selecting "Build Project"
• To program the board, in the Quick Panel, scroll down, and click [Project Name] Program (KitProg3_MiniProg4)

Run and Test

For this example, an oscilloscope is needed to monitor the smart I/O input and output port pins. In this example, Picoscope3000 series used with SW Pico scope 7 to monitor the input and output signals.

• Open the terminal program (example download and install Teraterm select the KitProg3 COM port. Set the serial port parameters to 8N1 and 115200 baud.
• After programming, the code example starts automatically.
• Monitor the input and put signals using oscilloscope.

Figure: Input and Output Signals

• You can also press User Button-1 on the board to generate input signal.
• You can debug the example to step through the code. In the IDE, use the [Project Name] Debug (KitProg3_MiniProg4) configuration in the Quick Panel. For details, see the "Program and debug" section in the Eclipse IDE for ModusToolbox™ software user guide.

Note: (Only while debugging) On the CM7 CPU, some code in main() may execute before the debugger halts at the beginning of main(). This means that some code executes twice: once before the debugger stops execution, and again after the debugger resets the program counter to the beginning of main(). See KBA231071 to learn about this and for the workaround.

References

Relevant Application notes are:

• AN235305 - Getting started with TRAVEO™ T2G family MCUs in ModusToolbox™
• AN220203 - Smart I/O Usage Setup in Traveo II Family

ModusToolbox™ is available online:

• https://www.infineon.com/modustoolbox

Associated TRAVEO™ T2G MCUs can be found on:

• https://www.infineon.com/cms/en/product/microcontroller/32-bit-traveo-t2g-arm-cortex-microcontroller/

More code examples can be found on the GIT repository:

• TRAVEO™ T2G Code examples

For additional trainings, visit our webpage:

• TRAVEO™ T2G trainings

For questions and support, use the TRAVEO™ T2G Forum:

• https://community.infineon.com/t5/TRAVEO-T2G/bd-p/TraveoII