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removed array returns, and array params. replaced with pointers
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@nishant-sachdeva
nishant-sachdeva committed Aug 9, 2024
1 parent 34da01c commit 28b8c8a
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Showing 2 changed files with 53 additions and 69 deletions.
110 changes: 46 additions & 64 deletions src/FlowAware.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -94,21 +94,11 @@ void IR2Vec_FA::collectWriteDefsMap(Module &M) {
}
}

// Vector IR2Vec_FA::getValue(std::string key) {
// Vector vec(DIM, 0);
// if (opcMap.find(key) == opcMap.end()) {
// IR2VEC_DEBUG(errs() << "cannot find key in map : " << key << "\n");
// dataMissCounter++;
// } else
// vec = opcMap[key];
// return vec;
// }

inline void IR2Vec_FA::getValue(IR2Vec::Vector &vec, std::string key) {
auto it = opcMap.find(key);
if (it == opcMap.end()) {
dataMissCounter++;
IR2VEC_DEBUG(errs() << "cannot find key in map : " << key << "\n");
dataMissCounter++;
} else
vec = it->second;
return;
Expand Down Expand Up @@ -139,7 +129,7 @@ void IR2Vec_FA::generateFlowAwareEncodings(std::ostream *o,
std::ostream *cyclicCount) {

int noOfFunc = 0;
#pragma omp for
#pragma omp parallel for
for (auto &f : M) {
if (!f.isDeclaration()) {
SmallVector<Function *, 15> funcStack;
Expand All @@ -150,7 +140,7 @@ void IR2Vec_FA::generateFlowAwareEncodings(std::ostream *o,
}
}

#pragma omp for
#pragma omp parallel for
for (auto funcit : funcVecMap) {
updateFuncVecMapWithCallee(funcit.first);
}
Expand Down Expand Up @@ -237,7 +227,7 @@ void IR2Vec_FA::generateFlowAwareEncodingsForFunction(
}
// iterating over all functions in module instead of funcVecMap to preserve
// order
#pragma omp for
#pragma omp parallel for
for (auto &f : M) {
if (funcVecMap.find(&f) != funcVecMap.end()) {
auto *function = const_cast<const Function *>(&f);
Expand Down Expand Up @@ -288,17 +278,16 @@ void IR2Vec_FA::topoDFS(int vertex, std::vector<bool> &Visited,
visitStack.push_back(vertex);
}

std::vector<int> IR2Vec_FA::topoOrder(int size) {
void IR2Vec_FA::topoOrder(std::vector<int> &visitStack, int size) {
std::vector<bool> Visited(size, false);
std::vector<int> visitStack;

for (auto &nodes : SCCAdjList) {
if (Visited[nodes.first] == false) {
topoDFS(nodes.first, Visited, visitStack);
}
}

return visitStack;
return;
}

void IR2Vec_FA::TransitiveReads(SmallVector<Instruction *, 16> &Killlist,
Expand All @@ -317,10 +306,9 @@ void IR2Vec_FA::TransitiveReads(SmallVector<Instruction *, 16> &Killlist,
TransitiveReads(Killlist, parentI, ParentBB);
}

SmallVector<Instruction *, 16>
IR2Vec_FA::createKilllist(Instruction *Arg, Instruction *writeInst) {
void IR2Vec_FA::createKilllist(SmallVector<Instruction *, 16> &KillList,
Instruction *Arg, Instruction *writeInst) {

SmallVector<Instruction *, 16> KillList;
SmallVector<Instruction *, 16> tempList;
BasicBlock *ParentBB = writeInst->getParent();

Expand All @@ -343,7 +331,7 @@ IR2Vec_FA::createKilllist(Instruction *Arg, Instruction *writeInst) {
KillList.push_back(*I);
}

return KillList;
return;
}

Vector IR2Vec_FA::func2Vec(Function &F,
Expand All @@ -364,20 +352,20 @@ Vector IR2Vec_FA::func2Vec(Function &F,

ReversePostOrderTraversal<Function *> RPOT(&F);

#pragma omp for
#pragma omp parallel for
for (auto *b : RPOT) {
for (auto &I : *b) {
unsigned opnum;
SmallVector<Instruction *, 16> lists;
if (isMemOp(I.getOpcodeName(), opnum, memWriteOps) &&
dyn_cast<Instruction>(I.getOperand(opnum))) {
Instruction *argI = cast<Instruction>(I.getOperand(opnum));
lists = createKilllist(argI, &I);
createKilllist(lists, argI, &I);
TransitiveReads(lists, argI, I.getParent());
if (argI->getParent() == I.getParent())
lists.push_back(argI);

#pragma openmp critical
#pragma omp critical
{ killMap[&I] = lists; }
}
}
Expand All @@ -387,7 +375,8 @@ Vector IR2Vec_FA::func2Vec(Function &F,
for (auto &I : *b) {
for (int i = 0; i < I.getNumOperands(); i++) {
if (isa<Instruction>(I.getOperand(i))) {
auto RD = getReachingDefs(&I, i);
SmallVector<const Instruction *, 10> RD;
getReachingDefs(RD, &I, i);
if (instReachingDefsMap.find(&I) == instReachingDefsMap.end()) {
instReachingDefsMap[&I] = RD;
} else {
Expand Down Expand Up @@ -488,7 +477,7 @@ Vector IR2Vec_FA::func2Vec(Function &F,

std::vector<int> stack;

stack = topoOrder(allSCCs.size());
topoOrder(stack, allSCCs.size());

for (int i = 0; i < allSCCs.size(); i++) {
if (std::find(stack.begin(), stack.end(), i) == stack.end()) {
Expand Down Expand Up @@ -714,24 +703,23 @@ bool isPotentiallyReachable(
Worklist, const_cast<BasicBlock *>(B->getParent()), ExclusionSet, DT, LI);
}

SmallVector<const Instruction *, 10>
IR2Vec_FA::getReachingDefs(const Instruction *I, unsigned loc) {
void IR2Vec_FA::getReachingDefs(llvm::SmallVector<const Instruction *, 10> &RD,
const Instruction *I, unsigned loc) {
IR2VEC_DEBUG(
outs()
<< "Call to getReachingDefs Started****************************\n");

auto parent = dyn_cast<Instruction>(I->getOperand(loc));
if (!parent)
return {};
return;

SmallVector<const Instruction *, 10> RD;
SmallVector<const Instruction *, 10> probableRD;
IR2VEC_DEBUG(outs() << "Inside RD for : ");
IR2VEC_DEBUG(I->print(outs()); outs() << "\n");

if (writeDefsMap[parent].empty()) {
RD.push_back(parent);
return RD;
return;
} else if (writeDefsMap[parent].size() >= 1) {
SmallMapVector<const BasicBlock *, SmallVector<const Instruction *, 10>, 16>
bbInstMap;
Expand Down Expand Up @@ -779,25 +767,16 @@ IR2Vec_FA::getReachingDefs(const Instruction *I, unsigned loc) {
IR2VEC_DEBUG(outs() << "Returning: ");
IR2VEC_DEBUG(probableRD->print(outs()); outs() << "\n");
RD.push_back(probableRD);
return RD;
return;
}
}

IR2VEC_DEBUG(outs() << "--------Across BB--------\n");
SmallVector<const Instruction *, 10> toDelete;
for (auto it : bbInstMap) {
IR2VEC_DEBUG(outs() << "--------INSTMAP BEGIN--------\n";
it.first->print(outs()); outs() << "\n");
bool first = true;
for (auto it1 : bbInstMap[it.first]) {
if (first) {
first = false;
continue;
}
toDelete.push_back(it1);
IR2VEC_DEBUG(it1->print(outs()); outs() << "\n");
for (auto &it : bbInstMap) {
auto &vec = it.second;
if (vec.size() > 1) { // Skip empty or single-element vectors
toDelete.insert(toDelete.end(), vec.begin() + 1, vec.end());
}
IR2VEC_DEBUG(outs() << "--------INSTMAP END--------\n");
}
auto tmp = probableRD;
probableRD = {};
Expand Down Expand Up @@ -838,11 +817,11 @@ IR2Vec_FA::getReachingDefs(const Instruction *I, unsigned loc) {
outs() << "\n";
outs()
<< "Call to getReachingDefs Ended****************************\n");
return RD;
return;
}

llvm_unreachable("unreachable");
return {};
return;
}

bool IR2Vec_FA::isMemOp(StringRef opcode, unsigned &operand,
Expand Down Expand Up @@ -870,7 +849,7 @@ void IR2Vec_FA::getPartialVec(
}

Vector instVector(DIM, 0);
Vector vec;
Vector vec(DIM, 0);
StringRef opcodeName = I.getOpcodeName();
getValue(vec, opcodeName.str());
IR2VEC_DEBUG(I.print(outs()); outs() << "\n");
Expand Down Expand Up @@ -927,9 +906,9 @@ void IR2Vec_FA::getPartialVec(
void IR2Vec_FA::solveInsts(
llvm::SmallMapVector<const llvm::Instruction *, IR2Vec::Vector, 16>
&partialInstValMap) {
std::map<unsigned, const Instruction *> xI;
std::map<const Instruction *, unsigned> Ix;
std::vector<std::vector<double>> A, B;
std::unordered_map<unsigned, const Instruction *> xI;
std::unordered_map<const Instruction *, unsigned> Ix;
std::vector<std::vector<double>> B;
SmallMapVector<const Instruction *,
SmallMapVector<const Instruction *, double, 16>, 16>
RDValMap;
Expand All @@ -946,7 +925,7 @@ void IR2Vec_FA::solveInsts(
B.push_back(tmp);
for (unsigned i = 0; i < inst->getNumOperands(); i++) {
if (isa<Function>(inst->getOperand(i))) {
Vector f;
Vector f(DIM, 0);
getValue(f, "function");
if (isa<CallInst>(inst)) {
auto ci = dyn_cast<CallInst>(inst);
Expand All @@ -972,7 +951,7 @@ void IR2Vec_FA::solveInsts(
B.push_back(vec);
} else if (isa<Constant>(inst->getOperand(i)) &&
!isa<PointerType>(inst->getOperand(i)->getType())) {
Vector c;
Vector c(DIM, 0);
getValue(c, "constant");
auto svtmp = c;
scaleVector(svtmp, WA);
Expand All @@ -986,7 +965,7 @@ void IR2Vec_FA::solveInsts(
IR2VEC_DEBUG(outs() << vec.back() << "\n");
B.push_back(vec);
} else if (isa<BasicBlock>(inst->getOperand(i))) {
Vector l;
Vector l(DIM, 0);
getValue(l, "label");
auto svtmp = l;
scaleVector(svtmp, WA);
Expand All @@ -1001,7 +980,8 @@ void IR2Vec_FA::solveInsts(
B.push_back(vec);
} else {
if (isa<Instruction>(inst->getOperand(i))) {
auto RD = getReachingDefs(inst, i);
SmallVector<const Instruction *, 10> RD;
getReachingDefs(RD, inst, i);
for (auto i : RD) {
// Check if value of RD is precomputed
if (instVecMap.find(i) == instVecMap.end()) {
Expand Down Expand Up @@ -1031,7 +1011,7 @@ void IR2Vec_FA::solveInsts(
}
}
} else if (isa<PointerType>(inst->getOperand(i)->getType())) {
Vector l;
Vector l(DIM, 0);
getValue(l, "pointer");
auto svtmp = l;
scaleVector(svtmp, WA);
Expand All @@ -1045,7 +1025,7 @@ void IR2Vec_FA::solveInsts(
IR2VEC_DEBUG(outs() << vec.back() << "\n");
B.push_back(vec);
} else {
Vector l;
Vector l(DIM, 0);
getValue(l, "variable");
auto svtmp = l;
scaleVector(svtmp, WA);
Expand All @@ -1064,11 +1044,10 @@ void IR2Vec_FA::solveInsts(
}
}

for (unsigned i = 0; i < xI.size(); i++) {
std::vector<double> tmp(xI.size(), 0);
A.push_back(tmp);
}
std::vector<std::vector<double>> A(xI.size(),
std::vector<double>(xI.size(), 0));

#pragma omp parallel for
for (unsigned i = 0; i < xI.size(); i++) {
A[i][i] = 1;
auto tmp = A[i];
Expand All @@ -1078,6 +1057,7 @@ void IR2Vec_FA::solveInsts(
}
}

#pragma omp parallel for collapse(2)
for (unsigned i = 0; i < B.size(); i++) {
for (unsigned j = 0; j < B[i].size(); j++) {
B[i][j] = (int)(B[i][j] * 10) / 10.0;
Expand Down Expand Up @@ -1171,7 +1151,8 @@ void IR2Vec_FA::solveSingleComponent(
getValue(vecOp, "label");
} else {
if (isa<Instruction>(I.getOperand(i))) {
auto RD = getReachingDefs(&I, i);
SmallVector<const Instruction *, 10> RD;
getReachingDefs(RD, &I, i);
RDList.insert(RDList.end(), RD.begin(), RD.end());
} else if (isa<PointerType>(I.getOperand(i)->getType())) {
getValue(vecOp, "pointer");
Expand Down Expand Up @@ -1248,7 +1229,7 @@ void IR2Vec_FA::inst2Vec(
}

Vector instVector(DIM, 0);
Vector vec;
Vector vec(DIM, 0);
StringRef opcodeName = I.getOpcodeName();
getValue(vec, opcodeName.str());
IR2VEC_DEBUG(I.print(outs()); outs() << "\n");
Expand Down Expand Up @@ -1330,7 +1311,8 @@ void IR2Vec_FA::inst2Vec(
getValue(vecOp, "label");
} else {
if (isa<Instruction>(I.getOperand(i))) {
auto RD = getReachingDefs(&I, i);
SmallVector<const Instruction *, 10> RD;
getReachingDefs(RD, &I, i);
RDList.insert(RDList.end(), RD.begin(), RD.end());
} else if (isa<PointerType>(I.getOperand(i)->getType()))
getValue(vecOp, "pointer");
Expand Down
12 changes: 7 additions & 5 deletions src/include/FlowAware.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -75,8 +75,9 @@ class IR2Vec_FA {
void getTransitiveUse(
const llvm::Instruction *root, const llvm::Instruction *def,
llvm::SmallVector<const llvm::Instruction *, 100> &visitedList);
llvm::SmallVector<const llvm::Instruction *, 10>
getReachingDefs(const llvm::Instruction *, unsigned i);

void getReachingDefs(llvm::SmallVector<const llvm::Instruction *, 10> &RD,
const llvm::Instruction *, unsigned i);

void solveSingleComponent(
const llvm::Instruction &I,
Expand All @@ -88,7 +89,7 @@ class IR2Vec_FA {

void solveInsts(llvm::SmallMapVector<const llvm::Instruction *,
IR2Vec::Vector, 16> &instValMap);
std::vector<int> topoOrder(int size);
void topoOrder(std::vector<int> &visitStack, int size);

void topoDFS(int vertex, std::vector<bool> &Visited,
std::vector<int> &visitStack);
Expand Down Expand Up @@ -116,8 +117,9 @@ class IR2Vec_FA {

void TransitiveReads(llvm::SmallVector<llvm::Instruction *, 16> &Killlist,
llvm::Instruction *Inst, llvm::BasicBlock *ParentBB);
llvm::SmallVector<llvm::Instruction *, 16>
createKilllist(llvm::Instruction *Arg, llvm::Instruction *writeInst);

void createKilllist(llvm::SmallVector<llvm::Instruction *, 16> &KillList,
llvm::Instruction *Arg, llvm::Instruction *writeInst);

// For Debugging
void print(IR2Vec::Vector t, unsigned pos) { llvm::outs() << t[pos]; }
Expand Down

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