CMSIS 5.2.0

Known Issues

• IAR Compiler 8.20.1 does not support access to PSPLIM and MPSLIM on ARMv8-M Baseline (Cortex-M23) using compiler intrinsics. You might get an error like:

  __set_PSPLIM((uint32_t)ProcessStackMemory);
  ^
  ".\tz_context.c",74 Error[Ta140]:
  Special register "PSPLIM" is not available

  Work around: Remove setting PSPLIM until a fixed compiler version is available.

• CMSIS-Zone documentation incomplete
  The documentation shipped with the released pack does not contain the generated JavaDoc for CMSIS-Zone generator model. Please refer to the documentation on http://arm-software.github.io/CMSIS_5/Zone.

Release Notes

CMSIS-Core(M): 5.1.0

• Added MPU Functions for ARMv8-M for Cortex-M23/M33.
• Added compiler_iccarm.h to replace compiler_iar.h shipped with the compiler.

CMSIS-Core(A): 1.1.0

• Added compiler_iccarm.h.
• Added additional access functions for physical timer.

CMSIS-DAP: 1.2.0

CMSIS-DSP: 1.5.2

CMSIS-Driver 2.6.0

• CAN Driver API V1.2.0
  • Added explicit BUSOFF state.
• NAND Driver API V2.3.0
  • Enhanced ECC capabilities.

CMSIS-RTOS:

• RTX: added variant for Infineon XMC4 series affected by PMU_CM.001 errata.

CMSIS-RTOS2:

• API 2.1.2
  • Relaxed some ISR-callable restrictions
• RTX 5.2.3
  • Added TrustZone Module Identifier configuration for Idle and Timer Thread.
  • Moved SVC/PendSV handler priority setup from osKernelInitialize to osKernelStart (User Priority Grouping can be updated after osKernelInitialize but before osKernelStart).
  • Corrected SysTick and PendSV handlers for ARMv8-M Baseline.
  • Corrected memory allocation for stack and data when "Object specific Memory allocation" configuration is used.
  • Added support for ARMv8-M IAR compiler.

Devices:

• Added GCC startup and linker script for Cortex-A9.
• Added device ARMCM0plus_MPU for Cortex-M0+ with MPU.
• Added IAR startup code for Cortex-A9