Approximate synchronization of simulation time for waveform comparisons

[sgherbst]

Issue reported by @azaidy

Problem is that simulators may run at slightly different rates and drift in terms of cycle count, making it hard to compare events between simulators.

Option 1

Change --max-rate so that clock tick N cannot occur before time N/rate vs. the current meaning, where each clock tick cannot be shorter than 1/rate. Have to think about what happens when one simulation falls behind - does it get stuck behind permanently and hog CPU resources, bringing down the rest of the simulation?

Option 2

Record the wall time of each clock tick and "fix" the VCD so that clock ticks are scaled according to the wall time taken. Scale factor could be max_rate/Fclk. To see why, imagine that a clock tick takes 1/max_rate of wall time; that will correspond to 1/Fclk of simulation time. Will result in strange-looking VCDs, but they will be correct in terms of event ordering.

[sgherbst]

Option 3 from @azaidy

Send clock tick number along with SB packets and accelerate the local tick count if the incoming tick value is higher. Then add gaps in the waveforms with postprocessing based on the tick value.