From 7c82726643a3842f202648bf7ef61774e0ac19c1 Mon Sep 17 00:00:00 2001 From: Logan Lavigne Date: Thu, 19 Jun 2025 15:27:58 -0300 Subject: [PATCH 1/6] Fixed output port size to be defined output port y size instead of input port a size. --- parmys/parmys-plugin/netlist/netlist_utils.cc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/parmys/parmys-plugin/netlist/netlist_utils.cc b/parmys/parmys-plugin/netlist/netlist_utils.cc index 9c3fb060b4f..b2092d81f56 100644 --- a/parmys/parmys-plugin/netlist/netlist_utils.cc +++ b/parmys/parmys-plugin/netlist/netlist_utils.cc @@ -1392,7 +1392,7 @@ void equalize_ports_size(nnode_t *&node, uintptr_t traverse_mark_number, netlist return; /* new port size */ - int new_out_size = port_a_size; + int new_out_size = port_y_size; /* creating the new node */ nnode_t *new_node = (port_b_size == -1) ? make_1port_gate(node->type, port_a_size, new_out_size, node, traverse_mark_number) @@ -1469,4 +1469,4 @@ void delete_npin(npin_t *pin) } // CLEAN UP free_npin(pin); -} \ No newline at end of file +} From b61db0f1e8160a349ba574dcb8614f24e4e1dbf9 Mon Sep 17 00:00:00 2001 From: Logan Lavigne Date: Fri, 25 Jul 2025 13:03:18 -0300 Subject: [PATCH 2/6] Attempting fixes for sub_cin_bug --- parmys/parmys-plugin/core/subtractor.cc | 64 +++++++++++++++++-------- 1 file changed, 44 insertions(+), 20 deletions(-) diff --git a/parmys/parmys-plugin/core/subtractor.cc b/parmys/parmys-plugin/core/subtractor.cc index 03c259f95ad..0142b82a111 100644 --- a/parmys/parmys-plugin/core/subtractor.cc +++ b/parmys/parmys-plugin/core/subtractor.cc @@ -501,7 +501,7 @@ void split_adder_for_sub(nnode_t *nodeo, int a, int b, int sizea, int sizeb, int if ((flag == 0 || count > 1) && !configuration.adder_cin_global) { // connect the a[0] of first adder node to ground, and b[0] of first adder node to vcc - connect_nodes(netlist->gnd_node, 0, node[0], 0); + connect_nodes(netlist->vcc_node, 0, node[0], 0); connect_nodes(netlist->vcc_node, 0, node[0], sizea); // hang the first sumout node[0]->output_pins[1] = allocate_npin(); @@ -570,7 +570,7 @@ void split_adder_for_sub(nnode_t *nodeo, int a, int b, int sizea, int sizeb, int } node[count - 1]->output_pins[0] = allocate_npin(); // Pad outputs with a unique and descriptive name to avoid collisions. - node[count - 1]->output_pins[0]->name = append_string("", "%s~dummy_output~%d~%d", node[(count - 1)]->name, (count - 1), 0); + //node[count - 1]->output_pins[0]->name = append_string("", "%s~dummy_output~%d~%d", node[(count - 1)]->name, (count - 1), 0); // connect_nodes(node[count - 1], (node[(count - 1)]->num_output_pins - 1), netlist->gnd_node, 0); // } @@ -628,27 +628,51 @@ void iterate_adders_for_sub(netlist_t *netlist) if (num >= min_threshold_adder) { // how many subtractors base on a can split - if ((a + 1) % sizea == 0) - counta = (a + offset) / sizea; - else - counta = (a + 1) / sizea + 1; - // how many subtractors base on b can split - if ((b + 1) % sizeb == 0) - countb = (b + offset) / sizeb; - else - countb = (b + 1) / sizeb + 1; - // how many subtractors need to be split - if (counta >= countb) - count = counta; + if (num >= min_threshold_adder && num >= min_add) { + // if the first cin in a chain is fed by a global input (offset = 0) the adder width is the + // input width + 1 (to pass the last cout -> sumout) divided by size of the adder input ports + // otherwise (offset = 1) a dummy adder is added to the chain to feed the first cin with gnd + // how many adders a can split + counta = (a + 1) / sizea + offset; + // how many adders b can split + countb = (b + 1) / sizeb + offset; + // how many adders need to be split + if (counta >= countb) + count = counta; + else + count = countb; + subchaintotal++; + split_adder_for_sub(node, a, b, sizea, sizeb, 1, 1, count, netlist); + } + // Store the node into processed_adder_list if the threshold is bigger than num else - count = countb; - subchaintotal++; - - split_adder_for_sub(node, a, b, sizea, sizeb, 1, 1, count, netlist); + processed_adder_list = insert_in_vptr_list(processed_adder_list, node); } - // Store the node into processed_adder_list if the threshold is bigger than num else - processed_adder_list = insert_in_vptr_list(processed_adder_list, node); + processed_adder_list = insert_in_vptr_list(processed_adder_list, node); + // if (num >= min_threshold_adder) { + // // how many subtractors base on a can split + // if ((a + 1) % sizea == 0) + // counta = (a + offset) / sizea; + // else + // counta = (a + 1) / sizea + 1; + // // how many subtractors base on b can split + // if ((b + 1) % sizeb == 0) + // countb = (b + offset) / sizeb; + // else + // countb = (b + 1) / sizeb + 1; + // // how many subtractors need to be split + // if (counta >= countb) + // count = counta; + // else + // count = countb; + // subchaintotal++; + + // split_adder_for_sub(node, a, b, sizea, sizeb, 1, 1, count, netlist); + // } + // // Store the node into processed_adder_list if the threshold is bigger than num + // else + // processed_adder_list = insert_in_vptr_list(processed_adder_list, node); } } From 8db8825ca566743cf1627c9d81a4dae06f4015e5 Mon Sep 17 00:00:00 2001 From: Logan Lavigne Date: Fri, 1 Aug 2025 10:54:22 -0300 Subject: [PATCH 3/6] Connected GND and VCC to inputs of last adder in chain --- parmys/parmys-plugin/core/subtractor.cc | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/parmys/parmys-plugin/core/subtractor.cc b/parmys/parmys-plugin/core/subtractor.cc index 0142b82a111..5d97edbee99 100644 --- a/parmys/parmys-plugin/core/subtractor.cc +++ b/parmys/parmys-plugin/core/subtractor.cc @@ -516,14 +516,25 @@ void split_adder_for_sub(nnode_t *nodeo, int a, int b, int sizea, int sizeb, int // for normal subtraction: if any input pins beside intial cin is NULL, it should connect to unconn // for unary subtraction: the first number should has the number of a input pins connected to gnd. The others are as same as normal subtraction + int tail = count -1; for (int i = 0; i < count; i++) { num = node[i]->num_input_pins; for (int j = 0; j < num - 1; j++) { if (node[i]->input_pins[j] == NULL) { if (nodeo->num_input_port_sizes != 3 && i * sizea + j < a) connect_nodes(netlist->gnd_node, 0, node[i], j); - else - connect_nodes(netlist->pad_node, 0, node[i], j); + else{ + if (i == count - 1){ + if (j == 0){ + connect_nodes(netlist->gnd_node, 0, node[i], j); + } + else if (j == 1) + connect_nodes(netlist->vcc_node, 0, node[i], j); + } + else{ + connect_nodes(netlist->pad_node, 0, node[i], j); + } + } } } } @@ -554,6 +565,12 @@ void split_adder_for_sub(nnode_t *nodeo, int a, int b, int sizea, int sizeb, int } } + //if(nodeo->output_pins[nodeo->num_output_pins - 1] == allocate_npin()) { + // npin_t* p = allocate_npin(); + // add_output_pin_to_node(nodeo, p, nodeo->num_output_pins - 1); + // nodeo->output_pins[nodeo->num_output_pins - 1] = p; + //} + if (count > 1 || configuration.adder_cin_global) { // remap the output pins of each adder to nodeo for (int i = offset; i < count; i++) { @@ -569,6 +586,10 @@ void split_adder_for_sub(nnode_t *nodeo, int a, int b, int sizea, int sizeb, int } } node[count - 1]->output_pins[0] = allocate_npin(); + //printf("Net of tail node: %s\n", node[5]->output_pins[1]->net); + std::cout << "TESTING " << node[5]->output_pins[1]->net->fanout_pins << "\n"; + std::cout << "TESTING " << node[3]->output_pins[1]->net->fanout_pins << "\n"; + //remap_pin_to_new_node(nodeo->output_pins[nodeo->num_output_pins - 1], node[count - 1], 0); // Pad outputs with a unique and descriptive name to avoid collisions. //node[count - 1]->output_pins[0]->name = append_string("", "%s~dummy_output~%d~%d", node[(count - 1)]->name, (count - 1), 0); // connect_nodes(node[count - 1], (node[(count - 1)]->num_output_pins - 1), netlist->gnd_node, 0); From 8ea75c869e34cf421ad6712570b45641626f3b06 Mon Sep 17 00:00:00 2001 From: Logan Lavigne Date: Thu, 21 Aug 2025 13:22:02 -0300 Subject: [PATCH 4/6] Attempting to fix tail slice output connections --- parmys/parmys-plugin/core/subtractor.cc | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/parmys/parmys-plugin/core/subtractor.cc b/parmys/parmys-plugin/core/subtractor.cc index 5d97edbee99..22fee9f7fb5 100644 --- a/parmys/parmys-plugin/core/subtractor.cc +++ b/parmys/parmys-plugin/core/subtractor.cc @@ -570,13 +570,15 @@ void split_adder_for_sub(nnode_t *nodeo, int a, int b, int sizea, int sizeb, int // add_output_pin_to_node(nodeo, p, nodeo->num_output_pins - 1); // nodeo->output_pins[nodeo->num_output_pins - 1] = p; //} - + // int W = nodeo->num_output_pins - 1; + // int sums_mapped = 0; if (count > 1 || configuration.adder_cin_global) { // remap the output pins of each adder to nodeo - for (int i = offset; i < count; i++) { + for (int i = offset; i < count - 1; i++) { for (int j = 0; j < node[i]->num_output_pins - 1; j++) { - if ((i * sizea + j - offset) < nodeo->num_output_pins) + if ((i * sizea + j - offset) < nodeo->num_output_pins-1){ remap_pin_to_new_node(nodeo->output_pins[i * sizea + j - offset], node[i], j + 1); + } else { node[i]->output_pins[j + 1] = allocate_npin(); // Pad outputs with a unique and descriptive name to avoid collisions. @@ -584,11 +586,12 @@ void split_adder_for_sub(nnode_t *nodeo, int a, int b, int sizea, int sizeb, int } } } + remap_pin_to_new_node(nodeo->output_pins[nodeo->num_output_pins - 1], node[count - 1], 0); } - node[count - 1]->output_pins[0] = allocate_npin(); + //node[count - 1]->output_pins[1] = allocate_npin(); //printf("Net of tail node: %s\n", node[5]->output_pins[1]->net); - std::cout << "TESTING " << node[5]->output_pins[1]->net->fanout_pins << "\n"; - std::cout << "TESTING " << node[3]->output_pins[1]->net->fanout_pins << "\n"; + //std::cout << "TESTING " << node[5]->output_pins[1]->net->fanout_pins << "\n"; + //std::cout << "TESTING " << node[3]->output_pins[1]->net->fanout_pins << "\n"; //remap_pin_to_new_node(nodeo->output_pins[nodeo->num_output_pins - 1], node[count - 1], 0); // Pad outputs with a unique and descriptive name to avoid collisions. //node[count - 1]->output_pins[0]->name = append_string("", "%s~dummy_output~%d~%d", node[(count - 1)]->name, (count - 1), 0); From 26213f96d898ef32dbf41ee1df95652b7618989a Mon Sep 17 00:00:00 2001 From: Logan Lavigne Date: Wed, 8 Oct 2025 16:59:41 -0300 Subject: [PATCH 5/6] Updating subtractor.cc, adder chain seems properly connected now --- parmys/parmys-plugin/core/subtractor.cc | 175 +++++++++++++++++++++++- parmys/parmys-plugin/parmys.cc | 11 ++ vtr_flow/misc/yosys/synthesis.tcl | 6 + 3 files changed, 186 insertions(+), 6 deletions(-) diff --git a/parmys/parmys-plugin/core/subtractor.cc b/parmys/parmys-plugin/core/subtractor.cc index 22fee9f7fb5..cf92d4e060a 100644 --- a/parmys/parmys-plugin/core/subtractor.cc +++ b/parmys/parmys-plugin/core/subtractor.cc @@ -572,12 +572,15 @@ void split_adder_for_sub(nnode_t *nodeo, int a, int b, int sizea, int sizeb, int //} // int W = nodeo->num_output_pins - 1; // int sums_mapped = 0; + + if (count > 1 || configuration.adder_cin_global) { // remap the output pins of each adder to nodeo - for (int i = offset; i < count - 1; i++) { + for (int i = offset; i < count; i++) { for (int j = 0; j < node[i]->num_output_pins - 1; j++) { - if ((i * sizea + j - offset) < nodeo->num_output_pins-1){ + if ((i * sizea + j - offset) < nodeo->num_output_pins){ remap_pin_to_new_node(nodeo->output_pins[i * sizea + j - offset], node[i], j + 1); + nodeo->output_pins[i * sizea + j - offset] = NULL; } else { node[i]->output_pins[j + 1] = allocate_npin(); @@ -586,18 +589,179 @@ void split_adder_for_sub(nnode_t *nodeo, int a, int b, int sizea, int sizeb, int } } } - remap_pin_to_new_node(nodeo->output_pins[nodeo->num_output_pins - 1], node[count - 1], 0); + //remap_pin_to_new_node(nodeo->output_pins[nodeo->num_output_pins - 1], node[count - 1], 1); } - //node[count - 1]->output_pins[1] = allocate_npin(); + node[count - 1]->output_pins[0] = allocate_npin(); + + + // const int W = nodeo->num_output_pins - 1; // number of sum bits + // // 1) Map sums from all real slices EXCEPT the last slice (tail) + // int sums = 0; + // for (int i = offset; i < count - 1 && sums < W; ++i) { + // const int sum_pins = node[i]->num_output_pins - 1; // skip pin0=cout + // for (int j = 0; j < sum_pins && sums < W; ++j) { + // int out_idx = /* pack densely or keep your spacing */ sums; + // remap_pin_to_new_node(nodeo->output_pins[out_idx], node[i], /*from pin*/ j + 1); + // nodeo->output_pins[out_idx] = NULL; + + // // Optional: if remap nulls source slot, pad it to keep iteration safe later + // if (node[i]->output_pins[j + 1] == nullptr) { + // node[i]->output_pins[j + 1] = allocate_npin(); + // node[i]->output_pins[j + 1]->name = + // append_string("", "%s~dummy_sum~%d~%d", node[i]->name, i, j + 1); + // } + // ++sums; + // } + // } + // if (count > 0) { + // remap_pin_to_new_node(nodeo->output_pins[W], node[count - 1], 1); + // nodeo->output_pins[W] = NULL; + // } + // node[count - 1]->output_pins[0] = allocate_npin(); //printf("Net of tail node: %s\n", node[5]->output_pins[1]->net); //std::cout << "TESTING " << node[5]->output_pins[1]->net->fanout_pins << "\n"; //std::cout << "TESTING " << node[3]->output_pins[1]->net->fanout_pins << "\n"; //remap_pin_to_new_node(nodeo->output_pins[nodeo->num_output_pins - 1], node[count - 1], 0); // Pad outputs with a unique and descriptive name to avoid collisions. - //node[count - 1]->output_pins[0]->name = append_string("", "%s~dummy_output~%d~%d", node[(count - 1)]->name, (count - 1), 0); + node[count - 1]->output_pins[0]->name = append_string("", "%s~dummy_output~%d~%d", node[(count - 1)]->name, (count - 1), 0); // connect_nodes(node[count - 1], (node[(count - 1)]->num_output_pins - 1), netlist->gnd_node, 0); // } + // for (int k = 0; k < nodeo->num_output_pins; ++k) { + // oassert(nodeo->output_pins[k] == NULL); + // } + + // for (int i = 1; i < count; ++i) { + // for (int p = 0; p < node[i]->num_output_pins; ++p) { + // if(i == 5 && p ==0) continue; + // oassert(node[i]->output_pins[p] != NULL); + // oassert(node[i]->output_pins[p]->net != NULL); + // oassert(node[i]->output_pins[p]->type == OUTPUT); + // oassert(node[i]->output_pins[p]->node == node[i]); + // oassert(node[i]->output_pins[p]->pin_node_idx == p); + // } + // } + + // for (int i = offset; i < count-1; ++i) + // oassert(node[i]->output_pins[1]->net->num_driver_pins == 1); + // oassert(node[count-1]->output_pins[1]->net->num_driver_pins == 1); // MSB via sumout + + // static const char* pin_role(const nnode_t* n, int pidx) { + // // adder: pin 0 = cout, 1 = sumout. For other nodes, return an empty tag. + // if (n && n->name && strstr(n->name, "adder")) { + // return pidx == 0 ? "cout" : (pidx == 1 ? "sum" : "?"); + // } + // return ""; + // } + + // int po_count = netlist->num_top_output_nodes; + + // for(int k = 0; k < po_count; k++) { //move through each primary output node + // nnode_t* po = netlist->top_output_nodes[k]; //po is PO[k] + // oassert(po); + // oassert(po->num_input_pins >= 1); + // npin_t* in = po->input_pins[0]; //in is input pin to po + // char tag[64]; snprintf(tag, sizeof(tag), "PO[%d] %s.in0", k, po->name ? po->name : "out"); + + // oassert(in && in->net); + // oassert(in->net->num_driver_pins == 1); + + // npin_t* d = in->net->driver_pins[0]; //d is the driver pin to in + // oassert(d && d->node); + // char* role; + // if(d->node && d->node->name && strstr(d->node->name, "adder")){ + // if(d->pin_node_idx == 0) role = "cout"; + // else if(d->pin_node_idx == 1) role = "sum"; + // else role = "?"; + // } + // fprintf(stderr, " -> driven by %s pin %d (%s)\n", + // d->node->name ? d->node->name : "(noname)", + // d->pin_node_idx, + // role); + // } + + // oassert(netlist->num_top_output_nodes == 5); + // for (int k = 0; k < 5; ++k) { + // nnode_t* po = netlist->top_output_nodes[k]; + // oassert(po && po->num_input_pins >= 1); + // npin_t* in = po->input_pins[0]; + // oassert(in && in->net && in->net->num_driver_pins == 1); + + // // Optional: ensure the driver is the expected slice pin: + // npin_t* drv = in->net->driver_pins[0]; + // oassert(drv && drv->node); + // // k=0..3 → slice [offset+k] pin1 (sumout), k=4 → tail pin1 (sumout) + // } + + //Create 1-to-1 identity node between drivers of PO nets and PO nodes to allow ABC to see POs + // for (int i = 0; i < netlist->num_top_output_nodes; i++) { + // nnode_t* po_node = netlist->top_output_nodes[i]; + // oassert(po_node && po_node->num_input_pins >= 1); + // npin_t* po_in = po_node->input_pins[0]; + // oassert(po_in && po_in->net); + // nnet_t* po_net = po_in->net; + // oassert(po_net->num_driver_pins == 1); + // npin_t* po_driver = po_net->driver_pins[0]; + // const char* out_name = po_net->name ? po_net->name : "out"; + + // nnet_t* id_net = allocate_nnet(); + // id_net->name = append_string("", "%s_id_net", out_name); + + // remap_pin_to_new_net(po_driver, id_net); + + // //identity node + // nnode_t* id_node = make_1port_gate(BUF_NODE, 1, 1, po_node, (short)-1); + // id_node->name = append_string("", "%s_abc_anchor", out_name); + // npin_t* id_in = allocate_npin(); + // add_input_pin_to_node(id_node, id_in, 0); + // add_fanout_pin_to_net(id_net, id_in); + // npin_t* id_out = allocate_npin(); + // add_output_pin_to_node(id_node, id_out, 0); + // add_driver_pin_to_net(po_net, id_out); + + // oassert(id_net->num_driver_pins == 1); + // oassert(po_net->num_driver_pins == 1); + // } + // for (int i = 0; i < netlist->num_top_output_nodes; i++) { + // nnode_t* po_node = netlist->top_output_nodes[i]; + // oassert(po_node && po_node->num_input_pins >= 1); + // npin_t* po_in = po_node->input_pins[0]; + // oassert(po_in && po_in->net); + // nnet_t* po_net = po_in->net; + // oassert(po_net->num_driver_pins == 1); + // npin_t* po_driver = po_net->driver_pins[0]; + // const char* out_name = po_net->name ? po_net->name : "out"; + + // nnet_t* id_net = allocate_nnet(); + // id_net->name = append_string("", "%s_id_net", out_name); + + // remap_pin_to_new_net(po_driver, id_net); + + // //identity NOT nodes + // nnode_t* n1 = make_not_gate(po_node, (short)-1); + // n1->name = append_string("", "%s_abc_anchor_n1", out_name); + + // nnet_t* id_net2 = allocate_nnet(); + // id_net2->name = append_string("", "%s_id_net2", out_name); + + // npin_t* n1_in = allocate_npin(); add_input_pin_to_node(n1, n1_in, 0); add_fanout_pin_to_net(id_net, n1_in); + // npin_t* n1_out = allocate_npin(); add_output_pin_to_node(n1, n1_out, 0); add_driver_pin_to_net(id_net2, n1_out); + + // // 3) Second NOT: id_net2 -> n2 -> po_net (n2 becomes the new driver of po_net) + // nnode_t* n2 = make_not_gate(po_node, (short)-1); + // n2->name = append_string("", "%s_abc_anchor_n2", out_name); + + // npin_t* n2_in = allocate_npin(); add_input_pin_to_node(n2, n2_in, 0); add_fanout_pin_to_net(id_net2, n2_in); + // npin_t* n2_out = allocate_npin(); add_output_pin_to_node(n2, n2_out, 0); add_driver_pin_to_net(po_net, n2_out); + + // // 4) Sanity + // oassert(id_net->num_driver_pins == 1); + // oassert(id_net2->num_driver_pins == 1); + // oassert(po_net->num_driver_pins == 1); + // oassert(po_net->driver_pins[0]->node == n2); + // } + + /* Freeing the old node! */ cleanup_sub_old_node(nodeo, netlist); @@ -605,7 +769,6 @@ void split_adder_for_sub(nnode_t *nodeo, int a, int b, int sizea, int sizeb, int vtr::free(not_node); return; } - /*------------------------------------------------------------------------- * (function: iterate_adders_for_sub) * diff --git a/parmys/parmys-plugin/parmys.cc b/parmys/parmys-plugin/parmys.cc index 9e0338586e7..d03181ae7ca 100644 --- a/parmys/parmys-plugin/parmys.cc +++ b/parmys/parmys-plugin/parmys.cc @@ -817,6 +817,17 @@ struct ParMYSPass : public Pass { log("\nTechmap Time: "); log_time(techmap_time); log("\n--------------------------------------------------------------------\n"); + + fprintf(stderr, "[BLIF-OUT] POs=%d\n", odin_netlist->num_top_output_nodes); + for (int k=0; knum_top_output_nodes; ++k) { + npin_t* in = odin_netlist->top_output_nodes[k]->input_pins[0]; + fprintf(stderr, " PO[%d]: net=%s driver=%s.pin%d\n", + k, + in->net && in->net->name ? in->net->name : "(noname)", + (in->net && in->net->driver_pins[0]->node && + in->net->driver_pins[0]->node->name) ? in->net->driver_pins[0]->node->name : "(null)", + in->net ? in->net->driver_pins[0]->pin_node_idx : -1); + } } static void report(netlist_t *odin_netlist) diff --git a/vtr_flow/misc/yosys/synthesis.tcl b/vtr_flow/misc/yosys/synthesis.tcl index 61d0c4a0bb6..6104ae4e303 100644 --- a/vtr_flow/misc/yosys/synthesis.tcl +++ b/vtr_flow/misc/yosys/synthesis.tcl @@ -80,12 +80,16 @@ techmap -map +/parmys/aldffe2dff.v opt -full +write_verilog -noexpr pre_parmys.v + # Separate options for Parmys execution (Verilog or SystemVerilog) if {$env(PARSER) == "default" || $env(PARSER) == "slang"} { # For Verilog, use -nopass for a simpler, faster flow parmys -a QQQ -nopass -c CCC YYY } +write_verilog -noexpr post_parmys.v + opt -full techmap @@ -99,4 +103,6 @@ stat hierarchy -check -auto-top -purge_lib +write_verilog -noexpr post_everything.v + write_blif -true + vcc -false + gnd -undef + unconn -blackbox ZZZ From 39e0cf6b44cc4ed5c53c8ccef5ad9fa5f1aaf339 Mon Sep 17 00:00:00 2001 From: Logan Lavigne Date: Wed, 8 Oct 2025 18:23:21 -0300 Subject: [PATCH 6/6] Removing commented out code --- parmys/parmys-plugin/core/subtractor.cc | 176 +----------------------- 1 file changed, 1 insertion(+), 175 deletions(-) diff --git a/parmys/parmys-plugin/core/subtractor.cc b/parmys/parmys-plugin/core/subtractor.cc index cf92d4e060a..18a09cd51fd 100644 --- a/parmys/parmys-plugin/core/subtractor.cc +++ b/parmys/parmys-plugin/core/subtractor.cc @@ -565,14 +565,6 @@ void split_adder_for_sub(nnode_t *nodeo, int a, int b, int sizea, int sizeb, int } } - //if(nodeo->output_pins[nodeo->num_output_pins - 1] == allocate_npin()) { - // npin_t* p = allocate_npin(); - // add_output_pin_to_node(nodeo, p, nodeo->num_output_pins - 1); - // nodeo->output_pins[nodeo->num_output_pins - 1] = p; - //} - // int W = nodeo->num_output_pins - 1; - // int sums_mapped = 0; - if (count > 1 || configuration.adder_cin_global) { // remap the output pins of each adder to nodeo @@ -589,179 +581,13 @@ void split_adder_for_sub(nnode_t *nodeo, int a, int b, int sizea, int sizeb, int } } } - //remap_pin_to_new_node(nodeo->output_pins[nodeo->num_output_pins - 1], node[count - 1], 1); } node[count - 1]->output_pins[0] = allocate_npin(); - - - // const int W = nodeo->num_output_pins - 1; // number of sum bits - // // 1) Map sums from all real slices EXCEPT the last slice (tail) - // int sums = 0; - // for (int i = offset; i < count - 1 && sums < W; ++i) { - // const int sum_pins = node[i]->num_output_pins - 1; // skip pin0=cout - // for (int j = 0; j < sum_pins && sums < W; ++j) { - // int out_idx = /* pack densely or keep your spacing */ sums; - // remap_pin_to_new_node(nodeo->output_pins[out_idx], node[i], /*from pin*/ j + 1); - // nodeo->output_pins[out_idx] = NULL; - - // // Optional: if remap nulls source slot, pad it to keep iteration safe later - // if (node[i]->output_pins[j + 1] == nullptr) { - // node[i]->output_pins[j + 1] = allocate_npin(); - // node[i]->output_pins[j + 1]->name = - // append_string("", "%s~dummy_sum~%d~%d", node[i]->name, i, j + 1); - // } - // ++sums; - // } - // } - // if (count > 0) { - // remap_pin_to_new_node(nodeo->output_pins[W], node[count - 1], 1); - // nodeo->output_pins[W] = NULL; - // } - // node[count - 1]->output_pins[0] = allocate_npin(); - //printf("Net of tail node: %s\n", node[5]->output_pins[1]->net); - //std::cout << "TESTING " << node[5]->output_pins[1]->net->fanout_pins << "\n"; - //std::cout << "TESTING " << node[3]->output_pins[1]->net->fanout_pins << "\n"; - //remap_pin_to_new_node(nodeo->output_pins[nodeo->num_output_pins - 1], node[count - 1], 0); // Pad outputs with a unique and descriptive name to avoid collisions. node[count - 1]->output_pins[0]->name = append_string("", "%s~dummy_output~%d~%d", node[(count - 1)]->name, (count - 1), 0); // connect_nodes(node[count - 1], (node[(count - 1)]->num_output_pins - 1), netlist->gnd_node, 0); // } - - // for (int k = 0; k < nodeo->num_output_pins; ++k) { - // oassert(nodeo->output_pins[k] == NULL); - // } - - // for (int i = 1; i < count; ++i) { - // for (int p = 0; p < node[i]->num_output_pins; ++p) { - // if(i == 5 && p ==0) continue; - // oassert(node[i]->output_pins[p] != NULL); - // oassert(node[i]->output_pins[p]->net != NULL); - // oassert(node[i]->output_pins[p]->type == OUTPUT); - // oassert(node[i]->output_pins[p]->node == node[i]); - // oassert(node[i]->output_pins[p]->pin_node_idx == p); - // } - // } - - // for (int i = offset; i < count-1; ++i) - // oassert(node[i]->output_pins[1]->net->num_driver_pins == 1); - // oassert(node[count-1]->output_pins[1]->net->num_driver_pins == 1); // MSB via sumout - - // static const char* pin_role(const nnode_t* n, int pidx) { - // // adder: pin 0 = cout, 1 = sumout. For other nodes, return an empty tag. - // if (n && n->name && strstr(n->name, "adder")) { - // return pidx == 0 ? "cout" : (pidx == 1 ? "sum" : "?"); - // } - // return ""; - // } - - // int po_count = netlist->num_top_output_nodes; - - // for(int k = 0; k < po_count; k++) { //move through each primary output node - // nnode_t* po = netlist->top_output_nodes[k]; //po is PO[k] - // oassert(po); - // oassert(po->num_input_pins >= 1); - // npin_t* in = po->input_pins[0]; //in is input pin to po - // char tag[64]; snprintf(tag, sizeof(tag), "PO[%d] %s.in0", k, po->name ? po->name : "out"); - - // oassert(in && in->net); - // oassert(in->net->num_driver_pins == 1); - - // npin_t* d = in->net->driver_pins[0]; //d is the driver pin to in - // oassert(d && d->node); - // char* role; - // if(d->node && d->node->name && strstr(d->node->name, "adder")){ - // if(d->pin_node_idx == 0) role = "cout"; - // else if(d->pin_node_idx == 1) role = "sum"; - // else role = "?"; - // } - // fprintf(stderr, " -> driven by %s pin %d (%s)\n", - // d->node->name ? d->node->name : "(noname)", - // d->pin_node_idx, - // role); - // } - - // oassert(netlist->num_top_output_nodes == 5); - // for (int k = 0; k < 5; ++k) { - // nnode_t* po = netlist->top_output_nodes[k]; - // oassert(po && po->num_input_pins >= 1); - // npin_t* in = po->input_pins[0]; - // oassert(in && in->net && in->net->num_driver_pins == 1); - - // // Optional: ensure the driver is the expected slice pin: - // npin_t* drv = in->net->driver_pins[0]; - // oassert(drv && drv->node); - // // k=0..3 → slice [offset+k] pin1 (sumout), k=4 → tail pin1 (sumout) - // } - - //Create 1-to-1 identity node between drivers of PO nets and PO nodes to allow ABC to see POs - // for (int i = 0; i < netlist->num_top_output_nodes; i++) { - // nnode_t* po_node = netlist->top_output_nodes[i]; - // oassert(po_node && po_node->num_input_pins >= 1); - // npin_t* po_in = po_node->input_pins[0]; - // oassert(po_in && po_in->net); - // nnet_t* po_net = po_in->net; - // oassert(po_net->num_driver_pins == 1); - // npin_t* po_driver = po_net->driver_pins[0]; - // const char* out_name = po_net->name ? po_net->name : "out"; - - // nnet_t* id_net = allocate_nnet(); - // id_net->name = append_string("", "%s_id_net", out_name); - - // remap_pin_to_new_net(po_driver, id_net); - - // //identity node - // nnode_t* id_node = make_1port_gate(BUF_NODE, 1, 1, po_node, (short)-1); - // id_node->name = append_string("", "%s_abc_anchor", out_name); - // npin_t* id_in = allocate_npin(); - // add_input_pin_to_node(id_node, id_in, 0); - // add_fanout_pin_to_net(id_net, id_in); - // npin_t* id_out = allocate_npin(); - // add_output_pin_to_node(id_node, id_out, 0); - // add_driver_pin_to_net(po_net, id_out); - - // oassert(id_net->num_driver_pins == 1); - // oassert(po_net->num_driver_pins == 1); - // } - // for (int i = 0; i < netlist->num_top_output_nodes; i++) { - // nnode_t* po_node = netlist->top_output_nodes[i]; - // oassert(po_node && po_node->num_input_pins >= 1); - // npin_t* po_in = po_node->input_pins[0]; - // oassert(po_in && po_in->net); - // nnet_t* po_net = po_in->net; - // oassert(po_net->num_driver_pins == 1); - // npin_t* po_driver = po_net->driver_pins[0]; - // const char* out_name = po_net->name ? po_net->name : "out"; - - // nnet_t* id_net = allocate_nnet(); - // id_net->name = append_string("", "%s_id_net", out_name); - - // remap_pin_to_new_net(po_driver, id_net); - - // //identity NOT nodes - // nnode_t* n1 = make_not_gate(po_node, (short)-1); - // n1->name = append_string("", "%s_abc_anchor_n1", out_name); - - // nnet_t* id_net2 = allocate_nnet(); - // id_net2->name = append_string("", "%s_id_net2", out_name); - - // npin_t* n1_in = allocate_npin(); add_input_pin_to_node(n1, n1_in, 0); add_fanout_pin_to_net(id_net, n1_in); - // npin_t* n1_out = allocate_npin(); add_output_pin_to_node(n1, n1_out, 0); add_driver_pin_to_net(id_net2, n1_out); - - // // 3) Second NOT: id_net2 -> n2 -> po_net (n2 becomes the new driver of po_net) - // nnode_t* n2 = make_not_gate(po_node, (short)-1); - // n2->name = append_string("", "%s_abc_anchor_n2", out_name); - - // npin_t* n2_in = allocate_npin(); add_input_pin_to_node(n2, n2_in, 0); add_fanout_pin_to_net(id_net2, n2_in); - // npin_t* n2_out = allocate_npin(); add_output_pin_to_node(n2, n2_out, 0); add_driver_pin_to_net(po_net, n2_out); - - // // 4) Sanity - // oassert(id_net->num_driver_pins == 1); - // oassert(id_net2->num_driver_pins == 1); - // oassert(po_net->num_driver_pins == 1); - // oassert(po_net->driver_pins[0]->node == n2); - // } - - + /* Freeing the old node! */ cleanup_sub_old_node(nodeo, netlist);