Add esp32-eth-clk-out0[-spiram]. (#21)

Author: floitsch

README.md

@@ -28,11 +28,12 @@ It is built for maximum compatibility.
 
 This variant supports Ethernet, but without the clock output.
 
-### esp32-eth-clk-out17
+### esp32-eth-clk-out0 and esp32-eth-clk-out17
 
-A variant for ESP32 boards with Ethernet and a clock output on pin 17.
+A variant for ESP32 boards with Ethernet and a clock output on pin 0/17.
 
-Olimex boards with Ethernet should use this variant.
+Olimex boards with Ethernet should use this variant. The WROOM versions need
+`esp32-eth-clk-out17` and the WROVER versions need `esp32-eth-clk-out0`.
 
 ### esp32c3
 

variants/esp32-eth-clk-out0-spiram/README.md

@@ -0,0 +1,11 @@
+# ESP32-ETH-CLK-OUT17-SPIRAM
+
+A variant of the ESP32 envelope that supports ethernet. The ESP32
+outputs the PHY's clock on pin 0. This variant furthermore enables
+SPIRAM.
+
+Since Bluetooth and SPIRAM support use some memory, the Toit interpreter
+doesn't fit into the SPIRAM anymore. As such, Toit programs may run
+slower on this variant.
+
+This firmware also increases the partition sizes to 0x1c0000 bytes.

variants/esp32-eth-clk-out0-spiram/partitions.csv

@@ -0,0 +1,17 @@
+# Copyright (C) 2023 Toitware ApS.
+#
+# Use of this source code is governed by a BSD0-style license that can be
+# found in the LICENSE_BSD0 file.
+
+# Partition Table for Toit.
+
+# Name,   Type, SubType,  Offset,    Size
+# bootloader,,  ,         0x001000,  0x007000
+# partitions,,  ,         0x008000,  0x000c00
+secure,   0x42, 0x00,     0x009000,  0x004000,
+otadata,  data, ota,      0x00d000,  0x002000,
+phy_init, data, phy,      0x00f000,  0x001000,
+ota_0,    app,  ota_0,    0x010000,  0x1c0000,
+ota_1,    app,  ota_1,    0x1d0000,  0x1c0000,
+nvs,      data, nvs,      0x390000,  0x010000,
+programs, 0x40, 0x00,     0x3A0000,  0x060000, encrypted

variants/esp32-eth-clk-out0-spiram/sdkconfig.defaults.patch

@@ -0,0 +1,34 @@
+--- toolchains/esp32/sdkconfig.defaults	2023-09-07 17:14:30.952105304 +0200
++++ toolchains/esp32-eth-clk-out0-spiram/sdkconfig.defaults	2023-09-07 17:20:30.187515185 +0200
+@@ -31,12 +31,17 @@
+ # CONFIG_SPI_SLAVE_ISR_IN_IRAM is not set
+ CONFIG_UART_ISR_IN_IRAM=y
+ # CONFIG_ESP_ERR_TO_NAME_LOOKUP is not set
++CONFIG_ETH_RMII_CLK_OUTPUT=y
++CONFIG_ETH_RMII_CLK_OUTPUT_GPIO0=y
+ CONFIG_ETH_SPI_ETHERNET_DM9051=y
+ CONFIG_ETH_SPI_ETHERNET_W5500=y
+ # CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS is not set
+ CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND=y
+ CONFIG_XTAL_FREQ_AUTO=y
+ # CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE is not set
++CONFIG_SPIRAM=y
++CONFIG_SPIRAM_IGNORE_NOTFOUND=y
++CONFIG_SPIRAM_USE_CAPS_ALLOC=y
+ CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240=y
+ # CONFIG_ESP_INT_WDT is not set
+ # CONFIG_ESP_TASK_WDT_EN is not set
+@@ -45,7 +49,6 @@
+ CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=16
+ # CONFIG_ESP32_WIFI_NVS_ENABLED is not set
+ CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_1=y
+-# CONFIG_ESP32_WIFI_IRAM_OPT is not set
+ CONFIG_FATFS_LFN_HEAP=y
+ CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=3
+ CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1024
+@@ -77,4 +80,5 @@
+ CONFIG_SPI_FLASH_LOG_FAILED_WRITE=y
+ CONFIG_SPI_FLASH_WARN_SETTING_ZERO_TO_ONE=y
+ # CONFIG_WS_TRANSPORT is not set
++# CONFIG_TOIT_INTERPRETER_IN_IRAM is not set
+ # CONFIG_TOIT_INTERPRETER_HELPERS_IN_IRAM is not set

variants/esp32-eth-clk-out0/sdkconfig.defaults.patch

@@ -0,0 +1,11 @@
+--- toolchains/esp32/sdkconfig.defaults	2023-09-07 15:57:43.119413430 +0200
++++ toolchains/esp32-eth-clk-out0/sdkconfig.defaults	2023-09-11 17:21:39.069585368 +0200
+@@ -31,6 +31,8 @@
+ # CONFIG_SPI_SLAVE_ISR_IN_IRAM is not set
+ CONFIG_UART_ISR_IN_IRAM=y
+ # CONFIG_ESP_ERR_TO_NAME_LOOKUP is not set
++CONFIG_ETH_RMII_CLK_OUTPUT=y
++CONFIG_ETH_RMII_CLK_OUTPUT_GPIO0=y
+ CONFIG_ETH_SPI_ETHERNET_DM9051=y
+ CONFIG_ETH_SPI_ETHERNET_W5500=y
+ # CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS is not set