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Merge pull request #2832 from fpistm/nucleo_wl3cc2
chore: add Nucleo WL33CC2
2 parents 365732a + 9f66aeb commit 07e97a5

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-4
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8 files changed

+123
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‎CI/build/conf/cores_config.json‎

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@@ -53,6 +53,8 @@
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"GENERIC_C092CBTX",
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"GENERIC_C092CBUX",
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"GENERIC_C092CCTX",
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"GENERIC_C092RBTX",
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"GENERIC_C092RCIX",
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"GENERIC_F031C4TX",
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"GENERIC_F031E6YX",
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"GENERIC_F031F4PX",
@@ -244,6 +246,7 @@
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"GENERIC_F411CCYX",
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"GENERIC_F411CEUX",
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"GENERIC_F411RCTX",
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"GENERIC_F411VCTX",
247250
"GENERIC_F412CEUX",
248251
"GENERIC_F412RETX",
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"GENERIC_F412REYX",
@@ -889,6 +892,11 @@
889892
"GENERIC_WB55VGQX",
890893
"GENERIC_WB55VGYX",
891894
"GENERIC_WBA55CEUX",
895+
"GENERIC_WL33C8VX",
896+
"GENERIC_WL33C8VXX",
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"GENERIC_WL33CBVX",
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"GENERIC_WL33CBVXX",
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"GENERIC_WL33CCVX",
892900
"GENERIC_WL54CCUX",
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"GENERIC_WL54JCIX",
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"GENERIC_WL55CCUX",

‎CI/build/conf/cores_config_ci.json‎

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@@ -53,6 +53,8 @@
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"GENERIC_C092CBTX",
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"GENERIC_C092CBUX",
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"GENERIC_C092CCTX",
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"GENERIC_C092RBTX",
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"GENERIC_C092RCIX",
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"GENERIC_F031C4TX",
5759
"GENERIC_F031E6YX",
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"GENERIC_F031F4PX",
@@ -244,6 +246,7 @@
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"GENERIC_F411CCYX",
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"GENERIC_F411CEUX",
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"GENERIC_F411RCTX",
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"GENERIC_F411VCTX",
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"GENERIC_F412CEUX",
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"GENERIC_F412RETX",
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"GENERIC_F412REYX",
@@ -889,6 +892,11 @@
889892
"GENERIC_WB55VGQX",
890893
"GENERIC_WB55VGYX",
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"GENERIC_WBA55CEUX",
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"GENERIC_WL33C8VX",
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"GENERIC_WL33C8VXX",
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"GENERIC_WL33CBVX",
898+
"GENERIC_WL33CBVXX",
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"GENERIC_WL33CCVX",
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"GENERIC_WL54CCUX",
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"GENERIC_WL54JCIX",
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"GENERIC_WL55CCUX",

‎README.md‎

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@@ -166,6 +166,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| :green_heart: | STM32WB55RG | [P-Nucleo-WB55RG](https://www.st.com/en/evaluation-tools/p-nucleo-wb55.html) | *1.6.0* | BLE support with [STM32duinoBLE](https://github.com/stm32duino/STM32duinoBLE) |
167167
| :green_heart: | STM32WB55CG | [P-Nucleo-WB55 USB Dongle](https://www.st.com/en/evaluation-tools/p-nucleo-wb55.html) | *2.5.0* | BLE support with [STM32duinoBLE](https://github.com/stm32duino/STM32duinoBLE) |
168168
| :yellow_heart: | STM32WL3CCV | [Nucleo-WL33CC1](https://www.st.com/en/evaluation-tools/nucleo-wl33cc1.html) | **2.12.0** | |
169+
| :yellow_heart: | STM32WL3CCV | [Nucleo-WL33CC2](https://www.st.com/en/evaluation-tools/nucleo-wl33cc2.html) | **2.12.0** | |
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| :green_heart: | STM32WL55JC | [Nucleo WL55JC1](https://www.st.com/en/evaluation-tools/nucleo-wl55jc.html) | *2.1.0* | LoRa support not available |
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‎boards.txt‎

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Original file line numberDiff line numberDiff line change
@@ -995,6 +995,7 @@ Nucleo_64.menu.pnum.NUCLEO_WL33CC1.build.board=NUCLEO_WL33CC1
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Nucleo_64.menu.pnum.NUCLEO_WL33CC1.build.series=STM32WL3x
996996
Nucleo_64.menu.pnum.NUCLEO_WL33CC1.build.product_line=STM32WL3xx
997997
Nucleo_64.menu.pnum.NUCLEO_WL33CC1.build.variant=STM32WL3x/WL33C(8-B-C)Vx(X)
998+
Nucleo_64.menu.pnum.NUCLEO_WL33CC1.build.variant_h=variant_NUCLEO_WL33CCx.h
998999
Nucleo_64.menu.pnum.NUCLEO_WL33CC1.build.st_extra_flags=-D{build.product_line} {build.xSerial} -D__CORTEX_SC=0
9991000
Nucleo_64.menu.pnum.NUCLEO_WL33CC1.openocd.target=stm32wl3x
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Nucleo_64.menu.pnum.NUCLEO_WL33CC1.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WL3x/STM32WL33.svd
@@ -1003,6 +1004,25 @@ Nucleo_64.menu.pnum.NUCLEO_WL33CC1.upload.mode=hwRstPulse
10031004
Nucleo_64.menu.pnum.NUCLEO_WL33CC1.upload.start=0x10000000
10041005
Nucleo_64.menu.pnum.NUCLEO_WL33CC1.upload.parity=none
10051006

1007+
# NUCLEO_WL3CC2 board
1008+
Nucleo_64.menu.pnum.NUCLEO_WL33CC2=Nucleo WL33CC2
1009+
Nucleo_64.menu.pnum.NUCLEO_WL33CC2.node="NOD_WL33CC"
1010+
Nucleo_64.menu.pnum.NUCLEO_WL33CC2.upload.maximum_size=262144
1011+
Nucleo_64.menu.pnum.NUCLEO_WL33CC2.upload.maximum_data_size=32768
1012+
Nucleo_64.menu.pnum.NUCLEO_WL33CC2.build.mcu=cortex-m0plus
1013+
Nucleo_64.menu.pnum.NUCLEO_WL33CC2.build.board=NUCLEO_WL33CC2
1014+
Nucleo_64.menu.pnum.NUCLEO_WL33CC2.build.series=STM32WL3x
1015+
Nucleo_64.menu.pnum.NUCLEO_WL33CC2.build.product_line=STM32WL3xx
1016+
Nucleo_64.menu.pnum.NUCLEO_WL33CC2.build.variant=STM32WL3x/WL33C(8-B-C)Vx(X)
1017+
Nucleo_64.menu.pnum.NUCLEO_WL33CC2.build.variant_h=variant_NUCLEO_WL33CCx.h
1018+
Nucleo_64.menu.pnum.NUCLEO_WL33CC2.build.st_extra_flags=-D{build.product_line} {build.xSerial} -D__CORTEX_SC=0
1019+
Nucleo_64.menu.pnum.NUCLEO_WL33CC2.openocd.target=stm32wl3x
1020+
Nucleo_64.menu.pnum.NUCLEO_WL33CC2.debug.svd_file={runtime.tools.STM32_SVD.path}/svd/STM32WL3x/STM32WL33.svd
1021+
Nucleo_64.menu.pnum.NUCLEO_WL33CC2.upload.address=0x10040000
1022+
Nucleo_64.menu.pnum.NUCLEO_WL33CC2.upload.mode=hwRstPulse
1023+
Nucleo_64.menu.pnum.NUCLEO_WL33CC2.upload.start=0x10000000
1024+
Nucleo_64.menu.pnum.NUCLEO_WL33CC2.upload.parity=none
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10061026
# NUCLEO_WL55JC1 board
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Nucleo_64.menu.pnum.NUCLEO_WL55JC1=Nucleo WL55JC1
10081028
Nucleo_64.menu.pnum.NUCLEO_WL55JC1.node="NOD_WL55JC"

‎cmake/boards_db.cmake‎

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@@ -114091,7 +114091,7 @@ target_compile_definitions(NUCLEO_WL33CC1 INTERFACE
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"ARDUINO_NUCLEO_WL33CC1"
114092114092
"BOARD_NAME=\"NUCLEO_WL33CC1\""
114093114093
"BOARD_ID=NUCLEO_WL33CC1"
114094-
"VARIANT_H=\"variant_NUCLEO_WL33CC1.h\""
114094+
"VARIANT_H=\"variant_NUCLEO_WL33CCx.h\""
114095114095
)
114096114096
target_include_directories(NUCLEO_WL33CC1 INTERFACE
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${CMAKE_CURRENT_LIST_DIR}/../system/STM32WL3x
@@ -114152,6 +114152,88 @@ target_compile_options(NUCLEO_WL33CC1_xusb_HSFS INTERFACE
114152114152
"SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
114153114153
)
114154114154

114155+
# NUCLEO_WL33CC2
114156+
# -----------------------------------------------------------------------------
114157+
114158+
set(NUCLEO_WL33CC2_VARIANT_PATH "${CMAKE_CURRENT_LIST_DIR}/../variants/STM32WL3x/WL33C(8-B-C)Vx(X)")
114159+
set(NUCLEO_WL33CC2_MAXSIZE 262144)
114160+
set(NUCLEO_WL33CC2_MAXDATASIZE 32768)
114161+
set(NUCLEO_WL33CC2_MCU cortex-m0plus)
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set(NUCLEO_WL33CC2_FPCONF "-")
114163+
add_library(NUCLEO_WL33CC2 INTERFACE)
114164+
target_compile_options(NUCLEO_WL33CC2 INTERFACE
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"SHELL:-DSTM32WL3xx -D__CORTEX_SC=0"
114166+
"SHELL:"
114167+
"SHELL:"
114168+
"SHELL: "
114169+
-mcpu=${NUCLEO_WL33CC2_MCU}
114170+
)
114171+
target_compile_definitions(NUCLEO_WL33CC2 INTERFACE
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"STM32WL3x"
114173+
"ARDUINO_NUCLEO_WL33CC2"
114174+
"BOARD_NAME=\"NUCLEO_WL33CC2\""
114175+
"BOARD_ID=NUCLEO_WL33CC2"
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"VARIANT_H=\"variant_NUCLEO_WL33CCx.h\""
114177+
)
114178+
target_include_directories(NUCLEO_WL33CC2 INTERFACE
114179+
${CMAKE_CURRENT_LIST_DIR}/../system/STM32WL3x
114180+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WL3x_HAL_Driver/Inc
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${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/STM32WL3x_HAL_Driver/Src
114182+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WL3x/Include/
114183+
${CMAKE_CURRENT_LIST_DIR}/../system/Drivers/CMSIS/Device/ST/STM32WL3x/Source/Templates/gcc/
114184+
${NUCLEO_WL33CC2_VARIANT_PATH}
114185+
)
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114187+
target_link_options(NUCLEO_WL33CC2 INTERFACE
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"LINKER:--default-script=${NUCLEO_WL33CC2_VARIANT_PATH}/ldscript.ld"
114189+
"LINKER:--defsym=LD_FLASH_OFFSET=0x0"
114190+
"LINKER:--defsym=LD_MAX_SIZE=262144"
114191+
"LINKER:--defsym=LD_MAX_DATA_SIZE=32768"
114192+
"SHELL: "
114193+
-mcpu=${NUCLEO_WL33CC2_MCU}
114194+
)
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114196+
add_library(NUCLEO_WL33CC2_serial_disabled INTERFACE)
114197+
target_compile_options(NUCLEO_WL33CC2_serial_disabled INTERFACE
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"SHELL:"
114199+
)
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add_library(NUCLEO_WL33CC2_serial_generic INTERFACE)
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target_compile_options(NUCLEO_WL33CC2_serial_generic INTERFACE
114202+
"SHELL:-DHAL_UART_MODULE_ENABLED"
114203+
)
114204+
add_library(NUCLEO_WL33CC2_serial_none INTERFACE)
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target_compile_options(NUCLEO_WL33CC2_serial_none INTERFACE
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"SHELL:-DHAL_UART_MODULE_ENABLED -DHWSERIAL_NONE"
114207+
)
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add_library(NUCLEO_WL33CC2_usb_CDC INTERFACE)
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target_compile_options(NUCLEO_WL33CC2_usb_CDC INTERFACE
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"SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC -DDISABLE_GENERIC_SERIALUSB"
114211+
)
114212+
add_library(NUCLEO_WL33CC2_usb_CDCgen INTERFACE)
114213+
target_compile_options(NUCLEO_WL33CC2_usb_CDCgen INTERFACE
114214+
"SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_CDC"
114215+
)
114216+
add_library(NUCLEO_WL33CC2_usb_HID INTERFACE)
114217+
target_compile_options(NUCLEO_WL33CC2_usb_HID INTERFACE
114218+
"SHELL:-DUSBCON -DUSBD_VID=0x0483 -DUSBD_PID=0x5740 -DHAL_PCD_MODULE_ENABLED -DUSBD_USE_HID_COMPOSITE"
114219+
)
114220+
add_library(NUCLEO_WL33CC2_usb_none INTERFACE)
114221+
target_compile_options(NUCLEO_WL33CC2_usb_none INTERFACE
114222+
"SHELL:"
114223+
)
114224+
add_library(NUCLEO_WL33CC2_xusb_FS INTERFACE)
114225+
target_compile_options(NUCLEO_WL33CC2_xusb_FS INTERFACE
114226+
"SHELL:"
114227+
)
114228+
add_library(NUCLEO_WL33CC2_xusb_HS INTERFACE)
114229+
target_compile_options(NUCLEO_WL33CC2_xusb_HS INTERFACE
114230+
"SHELL:-DUSE_USB_HS"
114231+
)
114232+
add_library(NUCLEO_WL33CC2_xusb_HSFS INTERFACE)
114233+
target_compile_options(NUCLEO_WL33CC2_xusb_HSFS INTERFACE
114234+
"SHELL:-DUSE_USB_HS -DUSE_USB_HS_IN_FS"
114235+
)
114236+
114155114237
# NUCLEO_WL55JC1
114156114238
# -----------------------------------------------------------------------------
114157114239

‎variants/STM32WL3x/WL33C(8-B-C)Vx(X)/CMakeLists.txt‎

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@@ -22,7 +22,7 @@ add_library(variant_bin STATIC EXCLUDE_FROM_ALL
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generic_clock.c
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PeripheralPins.c
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variant_generic.cpp
25-
variant_NUCLEO_WL33CC1.cpp
25+
variant_NUCLEO_WL33CCx.cpp
2626
)
2727
target_link_libraries(variant_bin PUBLIC variant_usage)
2828

‎variants/STM32WL3x/WL33C(8-B-C)Vx(X)/variant_NUCLEO_WL33CC1.cpp‎ renamed to ‎variants/STM32WL3x/WL33C(8-B-C)Vx(X)/variant_NUCLEO_WL33CCx.cpp‎

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@@ -10,7 +10,7 @@
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*
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*******************************************************************************
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*/
13-
#if defined(ARDUINO_NUCLEO_WL33CC1)
13+
#if defined(ARDUINO_NUCLEO_WL33CC1) || defined(ARDUINO_NUCLEO_WL33CC2)
1414
#include "pins_arduino.h"
1515
#include "pinmap.h"
1616

@@ -112,4 +112,4 @@ WEAK void initVariant(void)
112112
#ifdef __cplusplus
113113
}
114114
#endif
115-
#endif /* ARDUINO_NUCLEO_WL33CC1 */
115+
#endif /* ARDUINO_NUCLEO_WL33CC1 || ARDUINO_NUCLEO_WL33CC2 */

‎variants/STM32WL3x/WL33C(8-B-C)Vx(X)/variant_NUCLEO_WL33CC1.h‎ renamed to ‎variants/STM32WL3x/WL33C(8-B-C)Vx(X)/variant_NUCLEO_WL33CCx.h‎

File renamed without changes.

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