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CHANGELOG.md

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@@ -29,6 +29,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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- DMA traits now require AsSlice instead of AsRef
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- `void::Void` replaced with `Infallible` where it is possible
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## [v0.4.0] - 2019-08-09
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### Added

README.md

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@@ -49,7 +49,7 @@ be specified as part of the `Cargo.toml` definition.
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```toml
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[dependencies.stm32f1xx-hal]
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version = "0.3.0"
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version = "0.4.0"
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features = ["stm32f100", "rt"]
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```
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@@ -99,14 +99,15 @@ fn main() -> ! {
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// in order to configure the port. For pins 0-7, crl should be passed instead.
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let mut led = gpioc.pc13.into_push_pull_output(&mut gpioc.crh);
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// Configure the syst timer to trigger an update every second
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let mut timer = Timer::syst(cp.SYST, 1.hz(), clocks);
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let mut timer = Timer::syst(cp.SYST, clocks)
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.start_count_down(1.hz());
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// Wait for the timer to trigger an update and change the state of the LED
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loop {
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block!(timer.wait()).unwrap();
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led.set_high();
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led.set_high().unwrap();
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block!(timer.wait()).unwrap();
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led.set_low();
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led.set_low().unwrap();
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}
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}
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```

src/gpio.rs

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@@ -77,7 +77,7 @@ macro_rules! gpio {
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]) => {
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/// GPIO
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pub mod $gpiox {
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use void::Void;
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use core::convert::Infallible;
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use core::marker::PhantomData;
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use crate::hal::digital::v2::{InputPin, OutputPin, StatefulOutputPin, toggleable};
@@ -157,7 +157,7 @@ macro_rules! gpio {
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}
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impl<MODE> OutputPin for $PXx<Output<MODE>> {
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type Error = Void;
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type Error = Infallible;
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fn set_high(&mut self) -> Result<(), Self::Error> {
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// NOTE(unsafe) atomic write to a stateless register
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Ok(unsafe { (*$GPIOX::ptr()).bsrr.write(|w| w.bits(1 << self.i)) })
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}
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impl<MODE> InputPin for $PXx<Input<MODE>> {
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type Error = Void;
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type Error = Infallible;
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fn is_high(&self) -> Result<bool, Self::Error> {
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self.is_low().map(|b| !b)
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}
@@ -195,7 +195,7 @@ macro_rules! gpio {
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impl <MODE> toggleable::Default for $PXx<Output<MODE>> {}
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impl InputPin for $PXx<Output<OpenDrain>> {
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type Error = Void;
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type Error = Infallible;
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fn is_high(&self) -> Result<bool, Self::Error> {
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self.is_low().map(|b| !b)
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}
@@ -454,7 +454,7 @@ macro_rules! gpio {
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}
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impl<MODE> OutputPin for $PXi<Output<MODE>> {
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type Error = Void;
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type Error = Infallible;
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fn set_high(&mut self) -> Result<(), Self::Error> {
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// NOTE(unsafe) atomic write to a stateless register
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Ok(unsafe { (*$GPIOX::ptr()).bsrr.write(|w| w.bits(1 << $i)) })
@@ -480,7 +480,7 @@ macro_rules! gpio {
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impl<MODE> toggleable::Default for $PXi<Output<MODE>> {}
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impl<MODE> InputPin for $PXi<Input<MODE>> {
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type Error = Void;
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type Error = Infallible;
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fn is_high(&self) -> Result<bool, Self::Error> {
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self.is_low().map(|b| !b)
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}
@@ -492,7 +492,7 @@ macro_rules! gpio {
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}
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impl InputPin for $PXi<Output<OpenDrain>> {
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type Error = Void;
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type Error = Infallible;
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fn is_high(&self) -> Result<bool, Self::Error> {
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self.is_low().map(|b| !b)
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}

src/rtc.rs

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@@ -18,7 +18,7 @@ use crate::backup_domain::BackupDomain;
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use crate::time::Hertz;
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use nb;
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use void::Void;
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use core::convert::Infallible;
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// The LSE runs at at 32 768 hertz unless an external clock is provided
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const LSE_HERTZ: u32 = 32_768;
@@ -170,11 +170,11 @@ impl Rtc {
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use nb::block;
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rtc.set_alarm(rtc.read_counts() + 5);
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// NOTE: Safe unwrap because Void can't be returned
173+
// NOTE: Safe unwrap because Infallible can't be returned
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block!(rtc.wait_alarm()).unwrap();
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```
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*/
177-
pub fn wait_alarm(&mut self) -> nb::Result<(), Void> {
177+
pub fn wait_alarm(&mut self) -> nb::Result<(), Infallible> {
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if self.regs.crl.read().alrf().bit() == true {
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self.regs.crl.modify(|_, w| w.alrf().clear_bit());
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Ok(())

src/serial.rs

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@@ -42,7 +42,7 @@ use core::sync::atomic::{self, Ordering};
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use nb;
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use crate::pac::{USART1, USART2, USART3};
45-
use void::Void;
45+
use core::convert::Infallible;
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use crate::afio::MAPR;
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use crate::dma::{dma1, CircBuffer, Static, Transfer, R, W, RxDma, TxDma};
@@ -387,7 +387,7 @@ macro_rules! hal {
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}
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impl crate::hal::serial::Write<u8> for Tx<$USARTX> {
390-
type Error = Void;
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type Error = Infallible;
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fn flush(&mut self) -> nb::Result<(), Self::Error> {
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// NOTE(unsafe) atomic read with no side effects

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