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rw record ramtype expression (#1098)
1 parent 2d8d643 commit 9676da8

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2 files changed

+62
-9
lines changed

2 files changed

+62
-9
lines changed

ceno_zkvm/src/instructions/global.rs

Lines changed: 8 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -188,7 +188,7 @@ impl<E: ExtensionField, P> GlobalConfig<E, P> {
188188

189189
let mut record = vec![];
190190
record.push(addr.expr());
191-
record.push(ram_type);
191+
record.push(ram_type.clone());
192192
record.extend(value.memory_expr());
193193
record.push(local_clk.expr());
194194

@@ -205,16 +205,17 @@ impl<E: ExtensionField, P> GlobalConfig<E, P> {
205205
local_clk.expr(),
206206
)?;
207207
// TODO: enforce shard = shard_id in the public values
208-
209-
cb.read_record(
208+
cb.read_rlc_record(
210209
|| "r_record",
211-
gkr_iop::RAMType::Memory, // FIXME: should be dynamic, either Register or Memory
210+
ram_type.clone(),
212211
record.clone(),
212+
cb.rlc_chip_record(record.clone()),
213213
)?;
214-
cb.write_record(
214+
cb.write_rlc_record(
215215
|| "w_record",
216-
gkr_iop::RAMType::Memory, // FIXME: should be dynamic, either Register or Memory
216+
ram_type,
217217
record.clone(),
218+
cb.rlc_chip_record(record),
218219
)?;
219220

220221
// enforces final_sum = \sum_i (x_i, y_i) using ecc quark protocol
@@ -441,7 +442,7 @@ impl<E: ExtensionField, P: Permutation<[E::BaseField; POSEIDON2_BABYBEAR_WIDTH]>
441442
// this is workaround, as call `construct_circuit` will not initialized selector
442443
// we can remove this one all opcode unittest migrate to call `build_gkr_iop_circuit`
443444

444-
assert!(num_structural_witin == 3);
445+
assert_eq!(num_structural_witin, 3);
445446
let selector_r_witin = WitIn { id: 0 };
446447
let selector_w_witin = WitIn { id: 1 };
447448
let selector_zero_witin = WitIn { id: 2 };

gkr_iop/src/circuit_builder.rs

Lines changed: 54 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -419,12 +419,22 @@ impl<E: ExtensionField> ConstraintSystem<E> {
419419
record: Vec<Expression<E>>,
420420
) -> Result<(), CircuitBuilderError> {
421421
let rlc_record = self.rlc_chip_record(record.clone());
422+
self.read_rlc_record(name_fn, (ram_type as u64).into(), record, rlc_record)
423+
}
424+
425+
pub fn read_rlc_record<NR: Into<String>, N: FnOnce() -> NR>(
426+
&mut self,
427+
name_fn: N,
428+
ram_type: Expression<E>,
429+
record: Vec<Expression<E>>,
430+
rlc_record: Expression<E>,
431+
) -> Result<(), CircuitBuilderError> {
422432
self.r_expressions.push(rlc_record);
423433
let path = self.ns.compute_path(name_fn().into());
424434
self.r_expressions_namespace_map.push(path);
425435
// Since r_expression is RLC(record) and when we're debugging
426436
// it's helpful to recover the value of record itself.
427-
self.r_ram_types.push(((ram_type as u64).into(), record));
437+
self.r_ram_types.push((ram_type, record));
428438
Ok(())
429439
}
430440

@@ -435,10 +445,22 @@ impl<E: ExtensionField> ConstraintSystem<E> {
435445
record: Vec<Expression<E>>,
436446
) -> Result<(), CircuitBuilderError> {
437447
let rlc_record = self.rlc_chip_record(record.clone());
448+
self.write_rlc_record(name_fn, (ram_type as u64).into(), record, rlc_record)
449+
}
450+
451+
pub fn write_rlc_record<NR: Into<String>, N: FnOnce() -> NR>(
452+
&mut self,
453+
name_fn: N,
454+
ram_type: Expression<E>,
455+
record: Vec<Expression<E>>,
456+
rlc_record: Expression<E>,
457+
) -> Result<(), CircuitBuilderError> {
438458
self.w_expressions.push(rlc_record);
439459
let path = self.ns.compute_path(name_fn().into());
440460
self.w_expressions_namespace_map.push(path);
441-
self.w_ram_types.push(((ram_type as u64).into(), record));
461+
// Since w_expression is RLC(record) and when we're debugging
462+
// it's helpful to recover the value of record itself.
463+
self.w_ram_types.push((ram_type, record));
442464
Ok(())
443465
}
444466

@@ -696,6 +718,21 @@ impl<'a, E: ExtensionField> CircuitBuilder<'a, E> {
696718
self.cs.read_record(name_fn, ram_type, record)
697719
}
698720

721+
pub fn read_rlc_record<NR, N>(
722+
&mut self,
723+
name_fn: N,
724+
ram_type: Expression<E>,
725+
record: Vec<Expression<E>>,
726+
rlc_record: Expression<E>,
727+
) -> Result<(), CircuitBuilderError>
728+
where
729+
NR: Into<String>,
730+
N: FnOnce() -> NR,
731+
{
732+
self.cs
733+
.read_rlc_record(name_fn, ram_type, record, rlc_record)
734+
}
735+
699736
pub fn write_record<NR, N>(
700737
&mut self,
701738
name_fn: N,
@@ -709,6 +746,21 @@ impl<'a, E: ExtensionField> CircuitBuilder<'a, E> {
709746
self.cs.write_record(name_fn, ram_type, record)
710747
}
711748

749+
pub fn write_rlc_record<NR, N>(
750+
&mut self,
751+
name_fn: N,
752+
ram_type: Expression<E>,
753+
record: Vec<Expression<E>>,
754+
rlc_record: Expression<E>,
755+
) -> Result<(), CircuitBuilderError>
756+
where
757+
NR: Into<String>,
758+
N: FnOnce() -> NR,
759+
{
760+
self.cs
761+
.write_rlc_record(name_fn, ram_type, record, rlc_record)
762+
}
763+
712764
pub fn rlc_chip_record(&self, records: Vec<Expression<E>>) -> Expression<E> {
713765
self.cs.rlc_chip_record(records)
714766
}

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